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IDT77V106L25 Datasheet(PDF) 19 Page - Integrated Device Technology

Part # IDT77V106L25
Description  3.3V ATM PHY for 25.6 and 51.2 Mbps
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT77V106L25 Datasheet(HTML) 19 Page - Integrated Device Technology

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19
IDT77V106L25
Diagnostic Control Register
Address: 0x02
Bit
Type
Initial State
Function
7
R/W
0 = normal
Force TxCLAV Deassert
This feature can be used during line loopback mode to prevent cells from being passed across the Utopia bus for
transmission.
6
R/W
0 = UTOPIA
RxCLAV Operation Select
The UTOPIA standard dictates that during cell mode operation, if the receive FIFO no longer has a complete cell
available for transfer from PHY, RxCLAV is deasserted following transfer of the last byte out of the PHY
to the upstream system. With this bit set, early deassertion of this signal will occur coincident with the end of Payload
byte 44 (as in octet mode for TxCLAV). This provides early indication to the upstream system of this impending
condition.
0 = "Standard UTOPIA RxCLAV"
1 = "Cell mode = Byte mode"
5
R/W
0 = Tri-state
Single/Multi-PHY Configuration Select
0 = single
Never tri-state RxDAY+TA, RxPARITY, and RxSOC
1 = Multi-PHY mode
Tri-state RxDATA, RxPARITY, and RxSOC when
RxEN = 1
4
R/W
0 = normal
RFLUSH = Clear Receive FIFO
This signal is used to tell the TC to flush (clear) all data in the receive FIFO. The TC signals this completion by
clearing this bit.
3
R/W
0 = normal
Insert Transmit Payload Error
Tells TC to insert cell payload errors in transmitted cells. This can be used to test error detection and recovery
systems at destination station, or, under loopback control, at the local receiving station. This payload error is
accomplished by flipping bit 0 of the last cell payload byte.
2
R/W
0 = normal
Insert Transmit HEC Error
Tells TC to insert HEC error in Byte 5 of transmitted cells. This can be used to test error detection and recovery
systems in downstream switches, or, under loopback control, the locak receiving station. The HEC error is
accomplished by flipping bit 0 of the HEC byte.
1, 0
R/W
0 = normal
Loopback Control
bit # 1
0
0
0 Normal mode (receive from network)
1
1 PHY Loopback
1
1 Line Loopback


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