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TLV2372IDG4 Datasheet(PDF) 22 Page - Texas Instruments |
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TLV2372IDG4 Datasheet(HTML) 22 Page - Texas Instruments |
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22 / 58 page  V BIAS1 V BIAS2 V + IN V - IN Class AB Control Circuitry V O V- (Ground) V+ Reference Current Copyright © 2016, Texas Instruments Incorporated 22 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 SLOS270F – MARCH 2001 – REVISED AUGUST 2016 www.ti.com Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated 8 Detailed Description 8.1 Overview The TLV237x single-supply CMOS operational amplifiers provide rail-to-rail input and output capability with 3-MHz bandwidth. Consuming only 550 μA the TLV237x is the perfect choice for portable and battery-operated applications. The maximum recommended supply voltage is 16 V, which allows the devices to be operated from (±8-V supplies down to ±1.35 V) a variety of rechargeable cells. The rail-to-rail inputs with high input impedance make the TLV237x ideal for sensor signal-conditioning applications. 8.2 Functional Block Diagram 8.3 Feature Description 8.3.1 Rail-to-Rail Input Operation The TLV237x input stage consists of two differential transistor pairs, NMOS and PMOS, that operate together to achieve rail-to-rail input operation. The transition point between these two pairs can be seen in Figure 2, Figure 3, and Figure 4 for a 2.7-V, 5-V, and 15-V supply. As the common-mode input voltage approaches the positive supply rail, the input pair switches from the PMOS differential pair to the NMOS differential pair. This transition occurs approximately 1.35 V from the positive rail and results in a change in offset voltage due to different device characteristics between the NMOS and PMOS pairs. If the input signal to the device is large enough to swing between both rails, this transition results in a reduction in common-mode rejection ratio (CMRR). If the input signal does not swing between both rails, it is best to bias the signal in the region where only one input pair is active. This is the region inFigure 2 through Figure 4 where the offset voltage varies slightly across the input range and optimal CMRR can be achieved. This has the greatest impact when operating from a 2.7-V supply voltage. 8.3.2 Driving a Capacitive Load When the amplifier is configured in this manner, capacitive loading directly on the output decreases the device phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater than 10 pF, TI recommends that a resistor be placed in series (RNULL) with the output of the amplifier, as shown in Figure 34. A minimum value of 20 Ω should work well for most applications. |
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