LMH0395

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SNLS323M – AUGUST 2010 – REVISED JULY 2015

9 Power Supply Recommendations

Follow these general guidelines when designing the power supply:

1. The power supply should be designed to provide the recommended operating conditions in terms of DC

voltage and maximum current consumption.

2. The maximum current draw for the LMH0395 is provided in the data sheet. This number can be used to

calculate the maximum current the supply must provide.

3. The LMH0395 does not require any special power supply filtering, provided the recommended operating

conditions are met. Use 0.1-µF capacitors as close to the device VDD pin as possible

10 Layout

10.1 Layout Guidelines

For information on layout and soldering of the WQFN package, please refer to the following application note: AN-

1187 Leadless Leadframe Package (LLP), SNOA401.

The ST 424, 292, and 259 standards have stringent requirements for the input return loss of receivers, which

essentially specify how closely the input must resemble a 75-

Ω network. Any non-idealities in the network

between the BNC and the equalizer will degrade the input return loss. Care must be taken to minimize

impedance discontinuities between the BNC and the equalizer to ensure that the characteristic impedance of this

trace is 75-

Ω. Please consider the following PCB recommendations:

•

Use surface mount components, and use the smallest components available. In addition, use the smallest

size component pads.

•

Select trace widths that minimize the impedance mismatch between the BNC and the equalizer.

•

Select a board stack-up that supports both 75-

Ω single-ended traces and 100-Ω loosely-coupled differential

traces.

•

Place return loss components closest to the equalizer input pins.

•

Maintain symmetry on the complementary signals.

•

Route 100-

Ω traces uniformly (keep trace widths and trace spacing uniform along the trace).

•

Avoid sharp bends in the signal path; use 45° or radial bends.

•

Place bypass capacitors close to each power pin, and use the shortest path to connect equalizer power and

ground pins to the respective power or ground planes.

Copyright © 2010–2015, Texas Instruments Incorporated

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