LMH0395

SNLS323M – AUGUST 2010 – REVISED JULY 2015

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2. Closely compare schematic against typical connection diagram in the data sheet.

3. Plan out the PCB layout and component placement to minimize parasitic.

4. Consult the BNC vendor for optimum BNC landing pattern.

8.2.3 Application Curves

Figure 17. Differential Serial Data Output After Equalizing

Figure 18. Differential Serial Data Output After Equalizing

200 Meters of Belden 1694A at 1.485 Gbps, PRBS10

200 Meters of Belden 1694A at 270 Mbps, PRBS10

Figure 19. Differential Serial Data Output 2.97 Gbps

Figure 20. Differential Serial Data Output 2.97 Gbps

PRBS10 After 20” FR4 and 0 dB De-Emphasis

PRBS10 After 20” FR4 and 5dB De-Emphasis

8.3 Dos and Don'ts

Special attention should be paid to the PCB layout for the high speed signals. SMPTE specifies the requirements

for the Serial Digital Interface to transport digital video at SD, HD, and 3 Gbps data rates over coaxial cables.

One of the requirements is meeting the required Return Loss. This requirement specifies how closely the port

resembles 75-

Ω impedance across a specified frequency band. The SMPTE specifications also defines the use

of AC coupling capacitors for transporting uncompressed serial data streams with heavy low frequency content.

This specification requires the use of a 1-µF AC coupling capacitor on the input of the LMH0395 to avoid low

frequency bandwidth limitation.

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