9.76 k:

3.16 k:

MOSI

SCK

SS

3.16 k:

3.16 k:

3.3V

Compliant

SPI Host

9.76 k:

9.76 k:

MISO

LMH0395

SNLS323M – AUGUST 2010 – REVISED JULY 2015

www.ti.com

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

The LMH0395 3 Gbps HD/SD Dual Output SDI Low Power Extended Reach Adaptive Cable Equalizer is

designed to equalize data transmitted over cable (or any media with similar dispersive loss characteristics). The

equalizer operates over a wide range of data rates from 125 Mbps to 2.97 Gbps and supports ST 424, ST 292,

ST 344, ST 259, and DVB-ASI standards. Additional features include separate carrier detect and output mute

pins which may be tied together to mute the output when no signal is present. A programmable mute reference is

provided to mute the output at a selectable level of signal degradation. The bypass pin allows the adaptive

equalizer to be bypassed. The LMH0395 accepts single-ended input. The input must be AC coupled. The

LMH0395 correctly handles equalizer pathological signals for standard definition and high definition serial digital

video, as described in ST RP 178 and RP 198, respectively.

8.1.1 Interfacing to 3.3-V SPI

The LMH0395 may be controlled through optional SPI register access. The LMH0395 SPI pins support 2.5-V

LVCMOS logic levels and are compliant with JEDEC JESD8-5 (see DC Electrical Characteristics). Care must be

taken when interfacing the SPI pins to other voltage levels.

The 2.5-V LMH0395 SPI pins may be interfaced to a 3.3-V compliant SPI host by using a voltage divider or level

translator. One implementation is a simple resistive voltage divider as shown in Figure 15.

Figure 15. 3.3-V SPI Interfacing

8.1.2 Crosstalk Immunity

Single-ended SDI signals are susceptible to crosstalk and good design practices should be employed to

minimize its effects. Most crosstalk originates through capacitive coupling from adjacent signals routed closely

together through traces and connectors. To reduce capacitive coupling, SDI signals should be appropriately

spaced apart or insulated from one another. This can be accomplished by physically isolating signal traces in the

layout and by providing additional ground pins between signal traces in connectors as necessary. These

techniques help to reduce crosstalk but do not eliminate it.

The LMH0395 was designed specifically with crosstalk in mind and incorporates advanced circuit design

techniques that help to isolate and minimize the effects of cross-coupling in high-density system designs.The

LMH0395's enhanced design results in minimal degradation in cable reach in the presence of crosstalk and

overall superior immunity against cross-coupling from neighboring channels.

22

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