0x7F

0x5A

1

MOSI

(host)

R/W

Addr

Data

0x7F

0x5A

1

R/W

Addr

Data

0x7F

0x5A

1

R/W

Addr

Data

XX

X

XX

XX

X

XX

XX

X

MISO

(host)

XX

0x7F

0x5A

1

R/W

Addr

Data

0x7F

1

0x5A

0x01

0x22

0

MOSI

(host)

R/W

Addr

Data

(Device 3)

0x00

0xFF

1

R/W

Addr

Data

(Device 2)

0x00

0x10

0

R/W

Addr

Data

(Device 1)

XX

X

XX

XX

X

XX

XX

X

MISO

(host)

0x7F

0xFF

1

R/W

Addr

Data

(Device 3)

0x7F

0xFF

1

R/W

Addr

Data

(Device 2)

0x7F

0xFF

1

R/W

Addr

Data

(Device 1)

0x01

0x22

0

0x00

0x88

1

0x00

0x10

0

48-bit SPI Transaction #1

48-bit SPI Transaction #2

XX

LMH0395

www.ti.com

SNLS323M – AUGUST 2010 – REVISED JULY 2015

Programming (continued)

7.5.1.7 SPI Daisy-Chain Read and Write Example

The following example further clarifies LMH0395 SPI daisy-chain operation. Assume a daisy-chain of three

LMH0395 devices (Device 1, Device 2, and Device 3), with Device 1 as the first device in the chain and Device 3

as the last device in the chain, as shown by the first three devices in Figure 9. Because there are three devices

in the daisy-chain, each SPI transaction is 48-bits long.

This example shows an SPI operation combining SPI reads and writes in order to accomplish the following three

tasks:

2. Read the contents of register 0x00 of Device 2.

3. Write 0x10 to register 0x00 of Device 1 in order to force the sleep mode.

Figure 12 shows the two 48-bit SPI transactions required to complete these tasks (the bits are shifted in left to

right).

Figure 12. SPI Daisy-Chain Read and Write Example

The following occurs at the end of the first transaction:

1. Write 0x22 to register 0x01 of Device 3.

2. Latch the data from register 0x00 of Device 2.

3. Write 0x10 to register 0x00 of Device 1.

In the second transaction, three dummy reads (each consisting of 16 “1”s) are shifted in, and the read data from

Device 2 (with value 0x88) appears on MISO in the 25th through 32nd clock cycles.

7.5.1.8 SPI Daisy-Chain Length Detection

A useful operation for the host may be to detect the length of the daisy-chain. This is a simple matter of shifting

in a series of dummy reads with a known data value (such as 0x5A). For an SPI daisy-chain of N LMH0395

devices, the known data value will appear on the host's MISO pin after N+1 writes. Assuming a daisy-chain of

three LMH0395 devices, the result of this operation is shown in Figure 13.

Figure 13. SPI Daisy-Chain Length Detection

7.5.1.9 Output Driver Adjustments and De-Emphasis Setting

The output driver swing (amplitude), offset voltage (common-mode voltage), and de-emphasis level are

adjustable through SPI register 01h. The output driver to control with SPI register 01h (either output driver 0 or

output driver 1) can be selected through bit 2 of SPI register 00h.

The output swing is adjustable through bits [7:6] of SPI register 01h. The default value for these register bits is

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