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AT49BV2048A Datasheet(PDF) 5 Page - ATMEL Corporation

Part # AT49BV2048A
Description  2-megabit (256K x 8/128K x 16) Single 2.7-volt Battery-Voltage??Flash Memory
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT49BV2048A Datasheet(HTML) 5 Page - ATMEL Corporation

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AT49BV/LV2048A
1914D–FLASH–03/02
PRODUCT IDENTIFICATION: The product identification mode identifies the device and man-
ufacturer as Atmel. It may be accessed by hardware or software operation. The hardware
operation mode can be used by an external programmer to identify the correct programming
algorithm for the Atmel product.
For details, see “Operating Modes” (for hardware operation) or “Software Product Identifica-
tion Entry/Exit” on page 13. The manufacturer and device codes are the same for both modes.
DATA POLLING: The AT49BV/LV2048A features Data Polling to indicate the end of a pro-
gram cycle. During a program cycle an attempted read of the last byte loaded will result in the
complement of the loaded data on I/O7. Once the program cycle has been completed, true
data is valid on all outputs and the next cycle may begin. During a chip or sector erase opera-
tion, an attempt to read the device will give a “0” on I/O7. Once the program or erase cycle has
completed, true data will be read from the device. Data Polling may begin at any time during
the program cycle.
TOGGLE BIT: In addition to Data Polling, the AT49BV/LV2048A provides another method for
determining the end of a program or erase cycle. During a program or erase operation, suc-
cessive attempts to read data from the device will result in I/O6 toggling between one and
zero. Once the program cycle has completed, I/O6 will stop toggling and valid data will be
read. Examining the toggle bit may begin at any time during a program cycle.
HARDWARE DATA PROTECTION: Hardware features protect against inadvertent programs
to the AT49BV/LV2048A in the following ways: (a) VCC sense: if VCC is below 1.8V (typical),
the program function is inhibited. (b) VCC power on delay: once VCC has reached the VCC
sense level, the device will automatically time out 10 ms (typical) before programming. (c) Pro-
gram inhibit: holding any one of OE low, CE high or WE high inhibits program cycles. (d) Noise
filter: pulses of less than 15 ns (typical) on the WE or CE inputs will not initiate a program
cycle.
INPUT LEVELS: While operating with a 2.7V to 3.6V power supply, the address and control
inputs (OE,CE and WE) may be driven from 0 to 5.5V without adversely affecting the opera-
tion of the device. The I/O lines can only be driven from 0 to VCC +0.6V.


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