CD54HC00_14 datasheet(4/15 Pages) TI1

Part #	CD54HC00

Description	High-Speed CMOS Logic Quad 2-Input NAND Gate

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Manufacturer	TI1 [Texas Instruments]

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4

Quiescent Device

Current

ICC

VCC or

GND

0

6

-

2

-

20

-

40

µA

HCT TYPES

High Level Input

Voltage

VIH

-

4.5 to

5.5

2-

-

2

-

2

-

V

Low Level Input

Voltage

VIL

-

4.5 to

5.5

-

0.8

-

0.8

-

0.8

V

High Level Output

Voltage

CMOS Loads

VOH

VIH or

VIL

- 0.02

4.5

4.4

-

4.4

-

4.4

-

V

High Level Output

Voltage

TTL Loads

- 4

4.5

3.98

-

3.84

-

3.7

-

V

Low Level Output

Voltage CMOS Loads

VOL

VIH or

VIL

0.02

4.5

-

0.1

-

0.1

-

0.1

V

Low Level Output

Voltage

TTL Loads

4

4.5

-

0.26

-

0.33

-

0.4

V

Input Leakage

Current

II

VCC

and

GND

-

5.5

-

±0.1

-

±1-

±1

µA

Quiescent Device

Current

ICC

VCC or

GND

0

5.5

-

2

-

20

-

40

µA

Additional Quiescent

Device Current Per

Input Pin: 1 Unit Load

∆ICC

(Note 2)

VCC

- 2.1

-

4.5 to

5.5

-

100

360

-

450

-

490

µA

NOTE:

2. For dual-supply systems theorectical worst case (VI = 2.4V, VCC = 5.5V) specification is 1.8mA.

DC Electrical Speciﬁcations (Continued)

PARAMETER

SYMBOL

TEST

CONDITIONS

VCC (V)

25oC

-40oC TO 85oC

-55oC TO 125oC

UNITS

VI (V)

IO (mA)

MIN

TYP

MAX

MIN

MAX

MIN

MAX

HCT Input Loading Table

INPUT

UNIT LOADS

nA

1.8

nB

1.1

NOTE: Unit Load is

∆ICC limit speciﬁed in DC Electrical Speciﬁca-

tions table, e.g. 360

µA max at 25oC.

Switching Speciﬁcations Input tr, tf = 6ns

PARAMETER

SYMBOL

TEST

CONDITIONS

VCC

(V)

25oC

-40oC TO 85oC

-55oC TO 125oC

UNITS

MIN

TYP

MAX

MIN

MAX

MIN

MAX

HC TYPES

Propagation Delay,

Input to Output (Figure 1)

tPLH, tPHL CL = 50pF

2

-

90

-

115

-

135

ns

4.5

-

18

-

23

-

27

ns

6

-

15

-

20

-

23

ns

Propagation Delay, Data Input to

Output Y

tPLH, tPHL CL = 15pF

5

-

7

-

----

pF

CD54HC00, CD74HC00, CD54HCT00, CD74HCT00

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