CD54HC00_14 datasheet(3/15 Pages) TI1

Part #	CD54HC00

Description	High-Speed CMOS Logic Quad 2-Input NAND Gate

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3

Absolute Maximum Ratings

Thermal Information

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V

DC Input Diode Current, IIK

For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA

DC Output Diode Current, IOK

For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA

DC Output Source or Sink Current per Output Pin, IO

For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA

DC VCC or Ground Current, ICC or IGND . . . . . . . . . . . . . . . . . .±50mA

Operating Conditions

Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . -55

oC to 125oC

Supply Voltage Range, VCC

HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V

HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC

Input Rise and Fall Time

2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)

4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)

6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)

Thermal Resistance (Typical, Note 1)

θJA (oC/W)

E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

Maximum Junction Temperature (Hermetic Package or Die) . . . 175oC

Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC

(SOIC - Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation

of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTE:

1. The package thermal impedance is calculated in accordance with JESD 51-7.

DC Electrical Speciﬁcations

PARAMETER

SYMBOL

TEST

CONDITIONS

VCC (V)

25oC

-40oC TO 85oC

-55oC TO 125oC

UNITS

VI (V)

IO (mA)

MIN

TYP

MAX

MIN

MAX

MIN

MAX

HC TYPES

High Level Input

Voltage

VIH

-

2

1.5

-

1.5

-

1.5

-

V

4.5

3.15

-

3.15

-

3.15

-

V

6

4.2

-

4.2

-

4.2

-

V

Low Level Input

Voltage

VIL

-

2

-

0.5

-

0.5

-

0.5

V

4.5

-

1.35

-

1.35

-

1.35

V

6

-

1.8

-

1.8

-

1.8

V

High Level Output

Voltage

CMOS Loads

VOH

VIH or

VIL

-0.02

2

1.9

-

1.9

-

1.9

-

V

-0.02

4.5

4.4

-

4.4

-

4.4

-

V

-0.02

6

5.9

-

5.9

-

5.9

-

V

High Level Output

Voltage

TTL Loads

--

-

----

V

-4

4.5

3.98

-

3.84

-

3.7

-

V

-5.2

6

5.48

-

5.34

-

5.2

-

V

Low Level Output

Voltage

CMOS Loads

VOL

VIH or

VIL

0.02

2

-

0.1

-

0.1

-

0.1

V

0.02

4.5

-

0.1

-

0.1

-

0.1

V

0.02

6

-

0.1

-

0.1

-

0.1

V

Low Level Output

Voltage

TTL Loads

--

-

----

V

4

4.5

-

0.26

-

0.33

-

0.4

V

5.2

6

-

0.26

-

0.33

-

0.4

V

Input Leakage

Current

II

VCC or

GND

-6

-

±0.1

-

±1-

±1

µA

CD54HC00, CD74HC00, CD54HCT00, CD74HCT00

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