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ADC12J1600 Datasheet(PDF) 15 Page - Texas Instruments |
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ADC12J1600 Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 98 page  ADC12J1600, ADC12J2700 www.ti.com SLAS969C – JANUARY 2014 – REVISED JULY 2015 Electrical Characteristics (continued) Unless otherwise noted, these specifications apply for V(VA12) = V(VD12) = 1.2 V, V(VA19) = 1.9 V, VIN full scale range at default setting (725 mVPP), VIN = –1 dBFS, differential AC-coupled sinewave input clock, ƒ(DEVCLK) = 2.7 or 1.6 GHz at 0.5 VPP with 50% duty cycle, R(RBIAS) = 3.3 kΩ ±0.1%, after a foreground (FG) mode calibration with timing calibration enabled. Typical values are at TA = 25°C. (1)(2) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TEMPERATURE DIODE CHARACTERISTICS Offset voltage (approx. 0.77 V) varies with 100-µA forward current –1.6 mV/°C process and must be measured for each Device active Temperature diode voltage V(TDIODE) part. Offset measurement should be done slope 100-µA forward current with PowerDown=1 to minimize device self- –1.6 mV/°C Device in power-down heating. CLOCK INPUT CHARACTERISTICS (DEVCLK±, SYSREF±, SYNC~/TMST±) Sine wave clock, TA = TMIN to TMAX 0.4 0.6 2 VPP VID(CLK) Differential clock input level Square wave clock, TA = TMIN to TMAX 0.4 0.6 2 VPP II(CLK) Input current VI = 0 or VI = VA ±1 µA Differential 0.02 pF CI(CLK) Input capacitance (4) Each input to ground 1 pF TA = 25°C 95 Ω RID(CLK) Differential input resistance TA = TMIN to TMAX 80 110 Ω CML OUTPUT CHARACTERISTICS (DS0–DS7±) Assumes ideal 100- Ω load VOD Differential output voltage Measured differentially 280 305 330 mV peak Default pre-emphasis setting VO(ofs) Output offset voltage 0.6 V Output+ and output– shorted together ±6 IOS Output short-circuit current mA Output+ or output– shorted to 0 V 12 ZOD Differential output impedance 100 Ω LVCMOS INPUT CHARACTERISTICS (SDI, SCLK, SCS, SYNC~) VIH Logic high input voltage See (5) 0.83 V VIL Logic low input voltage See (5) 0.4 V CI Input capacitance (4) (6) Each input to ground 1 pF LVCMOS OUTPUT CHARACTERISTICS (SDO, OR_T0, OR_T1) VOH CMOS H level output IOH = –400 µA (5) 1.65 1.9 V VOL CMOS L level output IOH = 400 µA (5) 0.01 0.15 V POWER SUPPLY CHARACTERISTICS ADC12J2700, ƒ(DEVCLK) = 2.7 GHz PD = 0, calibration = FG, bypass DDC 457 495 I(VA19) Analog 1.9-V supply current PD = 0, calibration = BG, bypass DDC 557 594 mA PD = 0, calibration = BG, decimate by 8, DDR = 0, P54 = 1 557 598 PD = 0, calibration = FG, bypass DDC 245 296 I(VA12) Analog 1.2-V supply current PD = 0, calibration = BG, bypass DDC 261 312 mA PD = 0, calibration = BG, decimate by 8, DDR = 0, P54 = 1 270 322 PD = 0, calibration = FG, bypass DDC 330 541 I(VD12) Digital 1.2-V supply current PD = 0, calibration = BG, bypass DDC 341 588 mA PD = 0, calibration = BG, decimate by 8, DDR = 0, P54 = 1 366 610 PD = 0, calibration = FG, bypass DDC 1.56 1.94 PD = 0, calibration = BG, bypass DDC 1.78 2.21 W PC Power consumption PD = 0, calibration = BG, decimate by 8, DDR = 0, P54 = 1 1.82 2.25 PD = 1 < 50 mW (6) The digital control pin capacitances are die capacitances only and is in addition to package and bond-wire capacitance of approximately 0.4 pF. Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback 15 Product Folder Links: ADC12J1600 ADC12J2700 |
Similar Part No. - ADC12J1600_16 |
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