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ADC12J1600 Datasheet(PDF) 14 Page - Texas Instruments |
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ADC12J1600 Datasheet(HTML) 14 Page - Texas Instruments |
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14 / 98 page  ADC12J1600, ADC12J2700 SLAS969C – JANUARY 2014 – REVISED JULY 2015 www.ti.com Electrical Characteristics (continued) Unless otherwise noted, these specifications apply for V(VA12) = V(VD12) = 1.2 V, V(VA19) = 1.9 V, VIN full scale range at default setting (725 mVPP), VIN = –1 dBFS, differential AC-coupled sinewave input clock, ƒ(DEVCLK) = 2.7 or 1.6 GHz at 0.5 VPP with 50% duty cycle, R(RBIAS) = 3.3 kΩ ±0.1%, after a foreground (FG) mode calibration with timing calibration enabled. Typical values are at TA = 25°C. (1)(2) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT –70 Interleaving offset spur at ¼ FIN = 600 MHz, –1 dBFS, decimate-by-8 ƒS/4 dBFS sampling rate (3) mode Calibration = BG –69 Interleaving spur at ½ –78 FIN = 600 MHz, –1 dBFS, decimate-by-8 ƒS/2 – FIN sampling rate – input dBFS mode Calibration = BG –79 frequency (3) Interleaving spur at ¼ –76 FIN = 600 MHz, –1 dBFS, decimate-by-8 ƒS/4 + FIN sampling rate + input dBFS mode Calibration = BG –77 frequency (3) Interleaving spur at ¼ –77 FIN = 600 MHz, –1 dBFS, decimate-by-8 ƒS/4 – FIN sampling rate – input dBFS mode Calibration = BG –72 frequency (3) –71 FIN = 600 MHz, –1 dBFS, decimate-by-8 mode THD Total harmonic distortion (3) Calibration = BG –71 dBFS FIN = 2400 MHz, –1 dBFS, decimate-by-8 mode –63 –77 FIN = 600 MHz, –1 dBFS, decimate-by-8 mode HD2 Second harmonic distortion (3) Calibration = BG –78 dBFS FIN = 2400 MHz, –1 dBFS, decimate-by-8 mode –65 –80 FIN = 600 MHz, –1 dBFS, decimate-by-8 mode HD3 Third harmonic distortion (3) Calibration = BG –77 dBFS FIN = 2400 MHz, –1 dBFS, decimate-by-8 mode –74 DDC CHARACTERISTICS Alias protection (4) 80 dB % of Alias protected bandwidth (4) 80 output BW Spurious-free dynamic range SFDR-DDC 100 dB of digital down-converter (4) Implementation loss (4) 0.5 dB ANALOG INPUT CHARACTERISTICS Minimum FSR setting (5) 500 Full-scale analog-differential VID(VIN) Default FSR setting, TA = TMIN to TMAX 650 725 800 mVPP input range Maximum FSR setting (5) 950 Differential 0.05 pF CI(VIN) Analog input capacitance (4) Each input pin to ground 1.5 pF RID(VIN) Differential input resistance 80 95 110 Ω –3 dB — calibration = BG 2.8 FPBW Full power bandwidth GHz –3 dB — calibration = FG 3.2 DC to 2 GHz 1.2 2 GHz to 4 GHz 3.8 Gain flatness dB DC to 2 GHz — calibration = BG 1.5 2 GHz to 4 GHz — calibration = BG 4.5 ANALOG OUTPUT CHARACTERISTICS (VCMO, VBG) I(VCMO) = ±100 µA, TA = 25°C 1.225 Common-mode output V(VCMO) V voltage I(VCMO) = ±100 µA, TA = TMIN to TMAX 1.185 1.265 Common-mode output- TCVO(VCMO) voltage temperature TA = TMIN to TMAX -21 ppm/°C coefficient Maximum VCMO output load C(LOAD_VCMO) 80 pF capacitance I(BG) = ±100 µA, TA = 25°C 1.248 Bandgap reference output VO(BG) V voltage I(BG) = ±100 µA, TA = TMIN to TMAX 1.195 1.3 Bandgap reference voltage TA = TMIN to TMAX, TCVref(BG) 0 ppm/°C temperature coefficient I(BG) = ±100 µA Maximum bandgap reference C(LOAD_BG) 80 pF output load capacitance (4) This parameter is specified by design and is not tested in production. (5) This parameter is specified by design, characterization, or both and is not tested in production. 14 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: ADC12J1600 ADC12J2700 |
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