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ADC12J1600 Datasheet(PDF) 11 Page - Texas Instruments |
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ADC12J1600 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 98 page ![]() ADC12J1600, ADC12J2700 www.ti.com SLAS969C – JANUARY 2014 – REVISED JULY 2015 Electrical Characteristics (continued) Unless otherwise noted, these specifications apply for V(VA12) = V(VD12) = 1.2 V, V(VA19) = 1.9 V, VIN full scale range at default setting (725 mVPP), VIN = –1 dBFS, differential AC-coupled sinewave input clock, ƒ(DEVCLK) = 2.7 or 1.6 GHz at 0.5 VPP with 50% duty cycle, R(RBIAS) = 3.3 kΩ ±0.1%, after a foreground (FG) mode calibration with timing calibration enabled. Typical values are at TA = 25°C. (1)(2) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT FIN = 350 MHz, –1 dBFS, 12-bit DDC bypass mode –73 TA = 25°C –70 TA = TMIN to TMAX –61 FIN = 600 MHz, –1 dBFS, 12-bit DDC bypass mode THD Total harmonic distortion TA = 25°C, calibration = BG –72 dBFS TA = TMIN to TMAX, calibration = BG –62 FIN = 1500 MHz, –1 dBFS, 12-bit DDC bypass mode –68 FIN = 2400 MHz, –1 dBFS, 12-bit DDC bypass mode –68 FIN = 350 MHz, –1 dBFS, 12-bit DDC bypass mode –72 TA = 25°C –79 TA = TMIN to TMAX –62 FIN = 600 MHz, –1 dBFS, 12-bit DDC bypass mode HD2 Second harmonic distortion TA = 25°C, calibration = BG –81 dBFS TA = TMIN to TMAX, calibration = BG –64 FIN = 1500 MHz, –1 dBFS, 12-bit DDC bypass mode –76 FIN = 2400 MHz, –1 dBFS, 12-bit DDC bypass mode –70 FIN = 350 MHz, –1 dBFS, 12-bit DDC bypass mode –72 TA = 25°C –75 TA = TMIN to TMAX –63 FIN = 600 MHz, –1 dBFS, 12-bit DDC bypass mode HD3 Third harmonic distortion TA = 25°C, calibration = BG –81 dBFS TA = TMIN to TMAX, calibration = BG –64 FIN = 1500 MHz, –1 dBFS, 12-bit DDC bypass mode –70 FIN = 2400 MHz, –1 dBFS, 12-bit DDC bypass mode –76 –147.3 dBFS/Hz 50- Ω AC-coupled terminated input Noise spectral density, –149.1 dBm/Hz 12-bit DDC bypass mode, ADC12J2700, NSD average NSD across Nyquist ƒ(DEVCLK) = 2.7 GHz –146.2 dBFS/Hz bandwidth FIN = 600 MHz, –1 dBFS –148.0 dBm/Hz DDC BYPASS MODE, ADC12J1600, ƒ(DEVCLK) = 1.6 GHz FIN = 350 MHz, –1 dBFS, 12-bit DDC bypass mode 55.3 TA = 25°C 54.9 Signal-to-noise ratio, TA = TMIN to TMAX 52.3 FIN = 600 MHz, –1 dBFS, 12-bit DDC bypass integrated across entire mode SNR Nyquist bandwidth TA = 25°C, calibration = BG 54.8 dBFS Input frequency-dependent TA = TMIN to TMAX, calibration = BG 52.2 interleaving spurs included FIN = 1500 MHz, –1 dBFS, 12-bit DDC bypass mode 52.5 FIN = 2400 MHz, –1 dBFS, 12-bit DDC bypass mode 49.8 FIN = 350 MHz, –1 dBFS, 12-bit DDC bypass mode 55.2 TA = 25°C 54.8 Signal-to-noise and distortion TA = TMIN to TMAX 52.1 FIN = 600 MHz, –1 dBFS, 12-bit DDC bypass ratio, integrated across entire mode SINAD Nyquist bandwidth TA = 25°C, calibration = BG 54.7 dBFS Input frequency-dependent TA = TMIN to TMAX, calibration = BG 52 interleaving spurs included FIN = 1500 MHz, –1 dBFS, 12-bit DDC bypass mode 52.4 FIN = 2400 MHz, –1 dBFS, 12-bit DDC bypass mode 49.7 FIN = 350 MHz, –1 dBFS, 12-bit DDC bypass mode 8.9 TA = 25°C 8.8 Effective number of bits, TA = TMIN to TMAX 8.4 FIN = 600 MHz, –1 dBFS, 12-bit DDC bypass integrated across entire mode ENOB Nyquist bandwidth TA = 25°C, calibration = BG 8.8 Bits Input frequency-dependent TA = TMIN to TMAX, calibration = BG 8.4 interleaving spurs included FIN = 1500 MHz, –1 dBFS, 12-bit DDC bypass mode 8.4 FIN = 2400 MHz, –1 dBFS, 12-bit DDC bypass mode 8 Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: ADC12J1600 ADC12J2700 |
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