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ADC12J1600 Datasheet(PDF) 10 Page - Texas Instruments |
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ADC12J1600 Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 98 page  ADC12J1600, ADC12J2700 SLAS969C – JANUARY 2014 – REVISED JULY 2015 www.ti.com Electrical Characteristics (continued) Unless otherwise noted, these specifications apply for V(VA12) = V(VD12) = 1.2 V, V(VA19) = 1.9 V, VIN full scale range at default setting (725 mVPP), VIN = –1 dBFS, differential AC-coupled sinewave input clock, ƒ(DEVCLK) = 2.7 or 1.6 GHz at 0.5 VPP with 50% duty cycle, R(RBIAS) = 3.3 kΩ ±0.1%, after a foreground (FG) mode calibration with timing calibration enabled. Typical values are at TA = 25°C. (1)(2) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DDC BYPASS Mode, ADC12J2700, ƒ(DEVCLK) = 2.7 GHz FIN = 350 MHz, –1 dBFS, 12-bit DDC bypass mode 55.1 TA = 25°C 54.9 Signal-to-noise ratio, TA = TMIN to TMAX 52.5 FIN = 600 MHz, –1 dBFS, 12-bit DDC bypass integrated across entire mode SNR Nyquist bandwidth TA = 25°C, calibration = BG 54.8 dBFS Input frequency-dependent TA = TMIN to TMAX, calibration = BG 52.4 interleaving spurs included FIN = 1500 MHz, –1 dBFS, 12-bit DDC bypass mode 52.5 FIN = 2400 MHz, –1 dBFS, 12-bit DDC bypass mode 50 FIN = 350 MHz, –1 dBFS, 12-bit DDC bypass mode 55 TA = 25°C 54.8 Signal-to-noise and distortion TA = TMIN to TMAX 52.3 FIN = 600 MHz, –1 dBFS, 12-bit DDC bypass ratio, integrated across entire mode SINAD Nyquist bandwidth TA = 25°C, calibration = BG 54.7 dBFS Input frequency-dependent TA = TMIN to TMAX, calibration = BG 52.2 interleaving spurs included FIN = 1500 MHz, –1 dBFS, 12-bit DDC bypass mode 52.4 FIN = 2400 MHz, –1 dBFS, 12-bit DDC bypass mode 50 FIN = 350 MHz, –1 dBFS, 12-bit DDC bypass mode 8.8 TA = 25°C 8.8 Effective number of bits, TA = TMIN to TMAX 8.4 FIN = 600 MHz, –1 dBFS, 12-bit DDC bypass integrated across entire mode ENOB Nyquist bandwidth TA = 25°C, calibration = BG 8.8 Bits Input frequency-dependent TA = TMIN to TMAX, calibration = BG 8.4 interleaving spurs included FIN = 1500 MHz, –1 dBFS, 12-bit DDC bypass mode 8.4 FIN = 2400 MHz, –1 dBFS, 12-bit DDC bypass mode 8 FIN = 350 MHz, –1 dBFS, 12-bit DDC bypass mode 66.7 TA = 25°C 71.6 TA = TMIN to TMAX 61 FIN = 600 MHz, –1 dBFS, 12-bit DDC bypass Spurious-free dynamic range mode SFDR Input frequency-dependent TA = 25°C, calibration = BG 70 dBFS interleaving spurs included TA = TMIN to TMAX, calibration = BG 59 FIN = 1500 MHz, –1 dBFS, 12-bit DDC bypass mode 65.2 FIN = 2400 MHz, –1 dBFS, 12-bit DDC bypass mode 58.6 TA = 25°C –77 TA = TMIN to TMAX –59.5 Interleaving offset spur at ½ FIN = 600 MHz, –1 dBFS, 12-bit DDC bypass ƒS/2 dBFS sampling rate mode TA = 25°C, calibration = BG –74 TA = TMIN to TMAX, calibration = BG –57.5 TA = 25°C –70 TA = TMIN to TMAX –54.5 Interleaving offset spur at ¼ FIN = 600 MHz, –1 dBFS, 12-bit DDC bypass ƒS/4 dBFS sampling rate mode TA = 25°C, calibration = BG –68 TA = TMIN to TMAX, calibration = BG –53 TA = 25°C –78 Interleaving offset spur at ½ TA = TMIN to TMAX –62 FIN = 600 MHz, –1 dBFS, 12-bit DDC bypass ƒS/2 – FIN sampling rate – input dBFS mode TA = 25°C, calibration = BG –76 frequency TA = TMIN to TMAX, calibration = BG –61 TA = 25°C –76 Interleaving offset spur at ¼ TA = TMIN to TMAX –61 FIN = 600 MHz, –1 dBFS, 12-bit DDC bypass ƒS/4 + FIN sampling rate + input dBFS mode TA = 25°C, calibration = BG –71 frequency TA = TMIN to TMAX, calibration = BG –59 TA = 25°C –77 Interleaving offset spur at ¼ TA = TMIN to TMAX –61.4 FIN = 600 MHz, –1 dBFS, 12-bit DDC bypass ƒS/4 – FIN sampling rate – input dBFS mode TA = 25°C, calibration = BG –76 frequency TA = TMIN to TMAX, calibration = BG –61 10 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: ADC12J1600 ADC12J2700 |
Similar Part No. - ADC12J1600_16 |
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Similar Description - ADC12J1600_16 |
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