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ADC12J1600 Datasheet(PDF) 79 Page - Texas Instruments |
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ADC12J1600 Datasheet(HTML) 79 Page - Texas Instruments |
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79 / 98 page  ADC12J1600, ADC12J2700 www.ti.com SLAS969C – JANUARY 2014 – REVISED JULY 2015 7.6.1.7.12 Rational NCO Reference Divisor Register (address = 0x20E to 0x20F) [reset = 0x0000] Figure 105. Rational NCO Reference Divisor Register (NCO_RDIV) 15 14 13 12 11 10 9 8 NCO_RDIV R/W-0x00h 7 6 5 4 3 2 1 0 NCO_RDIV R/W-0x00h Table 83. NCO_RDIV Field Descriptions Bit Field Type Reset Description 15-0 NCO_RDIV R/W 0x0000h Sometimes the 32-bit NCO frequency word does not provide the desired frequency step size and can only approximate the desired frequency. This results in a frequency error. Use this register to eliminate the frequency error. Use this equation to compute the proper value to program: NCO_RDIV = ƒS / ƒ(STEP) / 128 where • ƒS is the ADC sample rate • ƒ(STEP) is the desired NCO frequency step size (10) For example, if ƒS= 3072 MHz, and ƒ(STEP) = 10 KHz then: NCO_RDIV = 3072 MHz / 10 KHz / 128 = 2400 (11) Any combination of ƒS and ƒ(STEP) that results in a fractional value for NCO_RDIV is not supported. Values of NCO_RDIV larger than 8192 can degrade the NCO’s SFDR performance and are not recommended. This register is used for all configuration presets. Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback 79 Product Folder Links: ADC12J1600 ADC12J2700 |
Similar Part No. - ADC12J1600_16 |
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