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ADC12J1600 Datasheet(PDF) 67 Page - Texas Instruments |
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ADC12J1600 Datasheet(HTML) 67 Page - Texas Instruments |
67 / 98 page ![]() ADC12J1600, ADC12J2700 www.ti.com SLAS969C – JANUARY 2014 – REVISED JULY 2015 7.6.1.4.4 Analog Miscellaneous Register (address = 0x033) [reset = 0xC3] Figure 84. Analog Miscellaneous Register (ANA_MISC) 7 6 5 4 3 2 1 0 RESERVED SYNC_DIFF_PD RESERVED R/W-1100 0 R/W-0 R/W-11 Table 59. ANA_MISC Field Descriptions Bit Field Type Reset Description 7-3 RESERVED R/W 1100 0 2 SYNC_DIFF_PD R/W 0 Set this bit to power down the differential SYNC~± inputs for the JESD204B interface. The SYNC~± inputs can also serve as the TimeStamp input receiver for the TimeStamp function. The receiver must be powered up to support the time stamp or differential SYNC~. Default: 0b 1-0 RESERVED R/W 11 Default: 11b 7.6.1.4.5 Input Clamp Enable Register (address = 0x034) [reset = 0x2F] Figure 85. Input Clamp Enable Register (IN_CL_EN) 7 6 5 4 3 2 1 0 RESERVED INPUT_CLAMP_EN RESERVED R/W-00 R/W-1 R/W-0 1111 Table 60. IN_CL_EN Field Descriptions Bit Field Type Reset Description 7-6 RESERVED R/W 00 Default: 00b 5 INPUT_CLAMP_EN R/W 1 Set this bit to enable the analog input active clamping circuit. Enabled by default. Default: 1b 4-0 RESERVED R/W 0 1111 Default: 01111b Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback 67 Product Folder Links: ADC12J1600 ADC12J2700 |
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