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ADC12J1600 Datasheet(PDF) 5 Page - Texas Instruments |
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ADC12J1600 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 98 page  VA19 GND GND VA19 VD12 GND + ± 50 50 VA19 OE VD12 GND + ± 50 50 VA19 ADC12J1600, ADC12J2700 www.ti.com SLAS969C – JANUARY 2014 – REVISED JULY 2015 Pin Functions (continued) PIN EQUIVALENT CIRCUIT TYPE DESCRIPTION NAME NO. DATA DS0– 32 DS0+ 33 DS1– 35 DS1+ 36 Data DS2– 38 CML These pins are the high-speed serialized-data outputs with user-configurable O pre-emphasis. These outputs must always be terminated with a 100- Ω differential DS2+ 39 resistor at the receiver. DS3– 41 DS3+ 42 DS4– 44 DS4+ 45 DS5–/NCO_0 47 DS5+/NCO_0 48 Data DS6 −/NCO_1 50 DS5–/NCO_0, DS5+/NCO_0, DS6–/NCO_1, DS6+/NCO_1, DS7–/NCO_2 and DS7+/NCO_2: When decimation is enabled, these DS6+/NCO_1 51 pins become LVCMOS inputs and allow the host device to select the DS7 −/NCO_2 53 O/I specific NCO frequency or phase accumulator that is active. In this mode the positive (+) and negative (–) pins should be connected together and both driven. An acceptable alternative is to let one of the pair float while the other pin is driven. Connect these inputs to GND if they are not used DS7+/NCO_2 54 in the application. GROUND, RESERVED, DNC Do Not Connect DNC 67 — Do not connect DNC to any circuitry, power, or ground signals. Reserved Connect to Ground or Leave Unconnected: This reserved pin is a logic input for RSV 66 — possible future device versions. It is recommended to connect this pin to ground. Floating this pin is also permissible. Reserved RSV2 61 — Connect to Ground Connect this reserved input pin to ground for proper operation. Ground (GND) The exposed pad on the bottom of the package is the ground return for all supplies. This pad must be connected with multiple vias to the printed circuit board (PCB) Thermal Pad — ground planes to ensure proper electrical and thermal performance. The exposed center pad on the bottom of the package must be thermally and electrically connected (soldered) to a ground plane to ensure rated performance. LVCMOS OR_T0 25 Over-Range O Over-range detection status for T0 and T1 thresholds. Leave these pins OR_T1 26 unconnected if they are not used in the application. Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: ADC12J1600 ADC12J2700 |
Similar Part No. - ADC12J1600_16 |
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Similar Description - ADC12J1600_16 |
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