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ADC12J1600 Datasheet(PDF) 41 Page - Texas Instruments |
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ADC12J1600 Datasheet(HTML) 41 Page - Texas Instruments |
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41 / 98 page  ADC12J1600, ADC12J2700 www.ti.com SLAS969C – JANUARY 2014 – REVISED JULY 2015 Table 9. Filter Coefficient Details (continued) Filter Coefficient Set (Decimation Factor of Filter) CS7 (2) CS11 (2) CS15 (2) CS19 (2) CS55 (2) CS139 (5) 6159 6159 10707 10707 11593 11593 7825 7825 0 0 –10423 –10423 –18932 –18932 –21629 –21629 –15618 –15618 0 0 24448 24448 52645 52645 78958 78958 97758 97758 104858 7.3.6.4 DDC Output Data The DDC output data consist of 15-bit complex data plus the two over-range threshold-detection control bits. The following table lists the data format: 16-BIT OUTPUT WORD CHANNEL 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 I DDC Output In-Phase (I) 15 bit OR_T0 Q DDC Output Quadrature (Q) 15 bit OR_T1 7.3.6.5 Decimation Settings 7.3.6.5.1 Decimation Factor The decimation setting is adjustable over the following settings: • Bypass — no decimation • Decimate-by-4 • Decimate-by-8 • Decimate-by-10 • Decimate-by-16 • Decimate-by-20 • Decimate-by-32 NOTE Because the output format is complex I+Q, the effective output bandwidth is approximately two-times the value for a real output with the same decimation factor. 7.3.6.5.2 DDC Gain Boost The DDC gain boost (register 0x200, bit 4) provides additional gain through the DDC block. With a setting of 1 the final filter has 6.02-dB gain. With a setting of 0, the final filter has a 0-dB gain. This setting is recommended when the NCO is set near DC. 7.3.7 Data Outputs The data outputs (DSx±) are very high-speed differential outputs and conform to the JESD204B JEDEC standard. A CML (current-mode logic)-type output driver is used for each output pair. Output pre-emphasis is adjustable to compensate for longer PCB-trace lengths. Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback 41 Product Folder Links: ADC12J1600 ADC12J2700 |
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Similar Description - ADC12J1600_16 |
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