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TMC4210 Datasheet(PDF) 14 Page - TRINAMIC Motion Control GmbH & Co. KG. |
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TMC4210 Datasheet(HTML) 14 Page - TRINAMIC Motion Control GmbH & Co. KG. |
14 / 48 page ![]() TMC4210 DATASHEET (Rev. 1.03 / 2015-JUN-03) 14 www.trinamic.com TIMING CHARACTERISTICS OF THE SERIAL MICROCONTROLLER INTERFACE Symbol Parameter Min Typ Max Unit tSUCSC Setup Clocks for nSCS_C 3 CLK periods tHDCSC Hold Clocks for nSCS_C 3 CLK periods tSCKCL Serial Clock Low 3 CLK periods tSCKCH Serial Clock High 3 CLK periods tSD SDO_C valid after SCK_C low 2.5 3.5 CLK periods tIS nINTERRUPT status valid after nSCS_C low 2.5 CLK periods tSI SDO_C valid after nSCS_C high 4.5 CLK periods tDAMAGRAMuC Datagram Length 3+3+32*6= 198 CLK periods tDAMAGRAMuC Datagram Length 12.375 µs fCLK Clock Frequency 0 32 MHz tCLK Clock Period tCLK = 1 / fCLK 31.25 ns tPD CLK-rising-edge-to-Output Propagation Delay 5 ns 5.2.2 Datagram Structure The µC communicates with the TMC4210 via the four wire serial interface. Each datagram sent to the TMC4210 via the pin SDI_C and each datagram received from the TMC4210 via the pin SDO_C is 32 bits long. The first bit sent is the most significant bit (MSB) sdi_c_bit#31. The last bit sent is the least significant bit (LSB) sdi_c_bit#0 (see Figure 5.1). During the reception of a datagram, the TMC4210 immediately sends back a datagram of the same length to the microcontroller. This return datagram consists of requested read data in the lower 24 datagram bits and status bits in the higher 8 datagram bits. A read request is distinguished from a write request by the read/not write datagram bit (RW). 5.2.2.1 Datagrams Sent to the TMC4210 The datagrams sent to the TMC4210 are assorted in four groups of bits: RRS The register RAM select (RRS) bit selects either registers or the on-chip RAM. ADDRESS Address bits address memory within the register set or within the RAM area. RW The read / not write (RW) bit distinguishes between read access and write access: read: RW = 1 / write RW = 0. DATA Data bits are only for write access. For read access these bits are not used (don’t care) and should be set to 0. 32 BIT DATAGRAM SENT FROM µC TO THE TMC4210 VIA PIN SDI_C 3 1 3 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 8 7 6 5 4 3 2 1 0 ADDRESS DATA NOTE - Different internal registers of the TMC4210 have different lengths. For some registers only a subset of 24 data bits is used. - Unused data bits should be set to 0. - Some addresses select a couple of registers mapped together into the 24 data bit space. |
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Similar Description - TMC4210 |
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