 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TMC4210 Datasheet(PDF) 12 Page - TRINAMIC Motion Control GmbH & Co. KG. |
|
|
|||||||||||||||||||||||||||||
TMC4210 Datasheet(HTML) 12 Page - TRINAMIC Motion Control GmbH & Co. KG. |
|
|
12 / 48 page  TMC4210 DATASHEET (Rev. 1.03 / 2015-JUN-03) 12 www.trinamic.com 5 Control Interface The communication takes place via a four wire serial interface and 32 bit datagrams of fixed length. RESPONSIBILITIES ARE DEFINED AS FOLLOWS: - The microcontroller is the master of the TMC4210. It initializes the motion controller and sets target values for velocity, acceleration, and positioning. - The TMC4210 is the master of the stepper motor driver. The motion controller calculates, e.g., ramp profiles for positioning. It sends step and direction signals to the stepper motor driver. - The microcontroller initializes the stepper motor driver. Further, the microcontroller can read out status and error flags and thus make the diagnostics. AUTOMATIC POWER-ON RESET: - The TMC4210 cannot be accessed before the power-on reset is completed and the clock is stable. - All register bits are initialized with 0 during power-on reset, except the Step/Dir clock pre-devider STPDIV_4210 that is initialized with 15. 5.1 Bus Signals Signal Description TMC4210 Microcontroller Bus clock input SCK_C Serial data input SDI_C Serial data output SDO_C Chip select input nSCS_C 5.2 Serial Peripheral Interface for µC The serial microcontroller interface of the TMC4210 acts as a 32 bit shift register. COMMUNICATION BETWEEN µC AND THE TMC4210 1. The serial µC interface shifts serial data into SDI_C with each rising edge of the clock signal SCK_C. 2. Then, it copies the content of the 32 bit shift register into a buffer register with the rising edge of the selection signal nSCS_C. 3. The serial interface of the TMC4210 immediately sends back data read from registers or read from internal RAM via the signal SDO_C. 4. The signal SDO_C can be sampled with the rising edge of SCK_C. SDO_C becomes valid at least four CLK clock cycles after SCK_C becomes low as outlined in the timing diagram. 5.2.1 Timing A complete serial datagram frame has a fixed length of 32 bit. Because of on-the-fly processing of the input data stream, the serial µC interface of the TMC4210 requires the serial data clock signal SCK_C to have a minimum low / high time of three clock cycles. The SPI signals from the µC interface may be asynchronous to the clock signal CLK of the TMC4210. If the microcontroller and the TMC4210 work on different clock domains that run asynchronously by the timing of the SPI interface of the microcontroller should be made conservative in the way that the length of one SPI clock cycle equals 8 or more clock cycles of the TMC4210 clock CLK. |
Similar Part No. - TMC4210 |
|
Similar Description - TMC4210 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
