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NP45N06VDK Datasheet(PDF) 3 Page - Renesas Technology Corp |
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NP45N06VDK Datasheet(HTML) 3 Page - Renesas Technology Corp |
3 / 9 page ![]() NP45N06VDK R07DS1295EJ0100 Rev.1.00 Page 3 of 7 Oct 26, 2015 Electrical Characteristics (TA = 25°C) Item Symbol Min Typ Max Unit Test Conditions Zero Gate Voltage Drain Current IDSS 1 μA VDS = 60 V, VGS = 0 V Gate Leakage Current IGSS ±100 nA VGS = ±20 V, VDS = 0 V Gate to Source Threshold Voltage VGS(th) 1.5 2.1 2.5 V VDS = VGS, ID = 250 μA Forward Transfer Admittance ∗ 1 | yfs | 15 39 S VDS = 5 V, ID = 23 A Drain to Source On-state Resistance ∗ 1 RDS(on)1 9.0 11.6 m Ω VGS = 10 V, ID = 23 A RDS(on)2 11.5 19.6 m Ω VGS = 4.5 V, ID = 23 A Input Capacitance Ciss 1530 2300 pF VDS = 25 V, VGS = 0 V, f = 1 MHz Output Capacitance Coss 155 240 pF Reverse Transfer Capacitance Crss 55 100 pF Turn-on Delay Time td(on) 15 40 ns VDD = 30 V, ID = 23 A, VGS = 10 V, RG = 0 Ω Rise Time tr 5 20 ns Turn-off Delay Time td(off) 37 80 ns Fall Time tf 3 10 ns Total Gate Charge QG 25 38 nC VDD = 48 V, VGS = 10 V, ID = 45 A Gate to Source Charge QGS 6 nC Gate to Drain Charge QGD 6 nC Body Diode Forward Voltage ∗ 1 VF(S-D) 0.9 1.5 V IF = 45 A, VGS = 0 V Reverse Recovery Time trr 28 ns IF = 45 A, VGS = 0 V, di/dt = 100 A/ μs Reverse Recovery Charge Qrr 20 nC Note: *1. Pulsed test TEST CIRCUIT 3 GATE CHARGE VGS = 20 → 0 V PG. RG = 25 Ω 50 Ω D.U.T. L VDD TEST CIRCUIT 1 AVALANCHE CAPABILITY PG. D.U.T. RL VDD TEST CIRCUIT 2 SWITCHING TIME RG PG. IG = 2 mA 50 Ω D.U.T. RL VDD ID VDD IAS VDS BVDSS Starting Tch VGS 0 Duty Cycle ≤ 1% τ = 1 μs τ VGS Wave Form VDS Wave Form VGS VDS 10% 0 0 90% 90% 90% VGS V DS ton toff td(on) tr td(off) tf 10% 10% |
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