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TPS65010RGZT Datasheet(PDF) 47 Page - Texas Instruments |
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TPS65010RGZT Datasheet(HTML) 47 Page - Texas Instruments |
47 / 63 page ![]() TPS65010 www.ti.com SLVS149C – JUNE 2003 – REVISED SEPTEMBER 2015 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The VCORE and VMAIN converter are always enabled in a typical application. The VCORE output voltage can be disabled or reduced from 1.5 V to a lower, preset voltage under processor control. When the processor enters the sleep mode, a high signal on the LOW_PWR pin initiates the change VCORE typically supplies the digital part of the audio codec. When the processor is in sleep or low-power mode, the audio codec is powered off, so the VCORE voltage can be programmed to lower voltages without a problem. A typical audio codec (e.g., TI AIC23) consumes about 20-mA to 30-mA current from the VCORE power supply. It is recommended to supply LDO1 from VMAIN as shown in Figure 42. If this is not done, then subsequent to a UVLO, OVERTEMP, or BATT_COVER = 0 condition, the RESPWRON signal goes high before the VCORE rail has ramped and stabilized. Therefore, the processor core does not receive a power on reset signal. Copyright © 2003–2015, Texas Instruments Incorporated Submit Documentation Feedback 47 Product Folder Links: TPS65010 |
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