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TPS65010RGZT Datasheet(PDF) 39 Page - Texas Instruments |
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TPS65010RGZT Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 63 page  TPS65010 www.ti.com SLVS149C – JUNE 2003 – REVISED SEPTEMBER 2015 • 1 = BATT_COVER pin is low. Bit 5 - UVLO: • 0 = voltage at the VCC pin above UVLO threshold. • 1 = voltage at the VCC pin has dropped below the UVLO threshold. Bit 4 - not implemented Bit 3 - PGOOD LDO2: • 0 = LDO2 output in regulation, or LDO2 disabled with VREGS1<7> = 0 • 1 = LDO2 output out of regulation. Bit 2 - PGOOD LDO1: • 0 = LDO1 output in regulation, or LDO1 disabled with VREGS1<3> =0 • 1 = LDO1 output out of regulation. Bit 1 - PGOOD MAIN: • 0 = Main converter output in regulation. • 1 = Main converter output out of regulation. Bit 0 - PGOOD CORE: • 0 = Core converter output in regulation. • 1 = Core converter output out of regulation, or VDCDC2<7> = 1 in low-powermode. A rising edge in the REGSTATUS register contents causes INT to be driven low if it is not masked in the MASK2. 7.6.3 MASK1 Register (Address: 03h—Reset: FFh) Table 7. MASK1 Register MASK1 B7 B6 B5 B4 B3 B2 B1 B0 Mask Thermal Mask Bit name Mask USB Mask AC Mask Term Mask Taper Mask Chg Mask Prechg Suspend BattTemp Default 1 1 1 1 1 1 1 1 Read/write R/W R/W R/W R/W R/W R/W R/W R/W The MASK1 register is used to mask all or any of the conditions in the corresponding CHGSTATUS<7:0> positions being indicated at the INT pin. Default is to mask all. 7.6.4 MASK2 Register (Address: 04h—Reset: FFh) Table 8. MASK2 Register MASK2 B7 B6 B5 B4 B3 B2 B1 B0 Mask Mask Mask PGOOD Mask PGOOD Mask PGOOD Bit name Mask UVLO Mask PGOOD CORE PB_ONOFF BATT_COVER LDO2 LDO1 MAIN Default 1 1 1 1 1 1 1 Read/write R/W R/W R/W R/W R/W R/W R/W R/W The MASK2 register is used to mask all or any of the conditions in the corresponding REGSTATUS<7:0> positions being indicated at the INT pin. Default is to mask all. 7.6.5 ACKINT1 Register (Address: 05h—Reset: 00h) Table 9. ACKINT1 Register ACKINT1 B7 B6 B5 B4 B3 B2 B1 B0 Ack Thermal Ack Bit name Ack USB Ack AC Ack Term Ack Taper Ack Chg Ack Prechg Shutdown BattTemp Default 0 0 0 0 0 0 0 0 Read/write R R R R R R R R Copyright © 2003–2015, Texas Instruments Incorporated Submit Documentation Feedback 39 Product Folder Links: TPS65010 |
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