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TPS65010RGZT Datasheet(PDF) 24 Page - Texas Instruments

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Part # TPS65010RGZT
Description  Power and Battery Management IC for Li-Ion Powered Systems
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS65010RGZT Datasheet(HTML) 24 Page - Texas Instruments

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TPS65010
SLVS149C – JUNE 2003 – REVISED SEPTEMBER 2015
www.ti.com
where
IO(max) = maximum output current plus inductor ripple current
rDS(on)max= maximum P-channel switch rDSon.
RL = DC resistance of the inductor
VO(max)= nominal output voltage plus maximum output voltage tolerance
(2)
7.3.2.6 Active Discharge When Disabled
When the CORE and MAIN converters are disabled, due to an UVLO, BATT_COVER or OVERTEMP condition,
it is possible to actively pull down the outputs. This feature is disabled per default and is individually enabled
through the VDCDC1 and VDCDC2 registers in the serial interface. When this feature is enabled, the core and
main outputs are discharged by a 400-
Ω (typical) load.
7.3.2.7 Power Good Monitoring
Both the MAIN and CORE converters have power good comparators. Each comparator indicates when the
relevant output voltage has dropped 10% below its target value, with 5% hysteresis. The outputs of these
comparators are available in the REGSTATUS register through the serial interface. A maskable interrupt is
generated when any voltage rail drops below the 10% threshold. The comparators are disabled when the
converters are disabled.
7.3.2.8 Overtemperature Shutdown
The MAIN and CORE converters are automatically shut down if the temperature exceeds the trip point (see the
electrical characteristics). This detection is only active if the converters are in PWM mode, either by setting
FPWM = 1, or if the output current is high enough that the device runs in PWM mode automatically.
7.3.3 Low-Dropout Voltage Regulators
The low-dropout voltage regulators are designed to operate with low value ceramic input and output capacitors.
They operate with input voltages down to 1.8 V. The LDOs offer a maximum dropout voltage of 300 mV at rated
output current. Each LDO sports a current limit feature. Both LDOs are enabled per default, both LDOs can be
disabled or programmed through the serial interface using the VREGS1 register. The LDO outputs (when
enabled) are monitored by power good comparators, the outputs of which are available through the serial
interface. The LDOs also have reverse conduction prevention when disabled. This allows the possibility to
connect external regulators in parallel in systems with a backup battery.
7.3.3.1 Power Good Monitoring
Both the LDO1 and LDO2 linear regulators have power good comparators. Each comparator indicates when the
relevant output voltage has dropped 10% below it's target value, with 5% hysteresis. The outputs of these
comparators are available in the REGSTATUS register through the serial interface. An interrupt is generated
when any voltage rail drops below the 10% threshold. The LDO2 comparator is disabled when LDO2 is disabled.
The LDO1 power good comparator is always active since it generates the system reset signal, RESPWRON, see
the System Reset and Control Signal Section below. This also allows the possibility to monitor VLDO1, even if it
is provided by an external regulator.
7.3.3.2 Enable and Sequencing
Enabling and sequencing of the DC-DC converters and LDOs is described in the power-up sequencing section.
The OMAP1510 processor from Texas Instruments requires that the core power supply is enabled before the I/O
power supply, which means that the CORE converter should power up before the MAIN converter. This is
achieved by connecting PS_SEQ to GND.
7.3.4 Undervoltage Lockout
The undervoltage lockout circuit for the four regulators on TPS65010 prevents the device from malfunctioning at
low input voltages and from excessive discharge of the battery. Basically it prevents the converter from turning
on the power switch or rectifier FET under undefined conditions. The undervoltage threshold voltage is set by
default to 3.25 V. After power-up, the threshold voltage can be reprogrammed through the serial interface. The
undervoltage lockout comparator compares the voltage on the VCC pin with the UVLO threshold. When the VCC
24
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