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LP8862-Q1 Datasheet(PDF) 5 Page - Texas Instruments |
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LP8862-Q1 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 37 page LP8862-Q1 www.ti.com SNVSA75A – NOVEMBER 2015 – REVISED NOVEMBER 2015 6 Specifications 6.1 Absolute Maximum Ratings (1) (2) Over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VIN, VSENSE_N, SD, SW, FB –0.3 50 Voltage on pins OUT1, OUT2 –0.3 45 V LDO, SYNC, FSET, ISET, PWM, VDDIO/EN, FAULT –0.3 5.5 Continuous power dissipation(3) Internally Limited Ambient temperature range TA (4) –40 125 ºC Junction temperature range TJ (4) –40 150 ºC Maximum lead temperature (soldering) See(5) ºC Storage temperature, Tstg –65 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltages are with respect to the potential at the GND pins. (3) Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 165°C (typical) and disengages at TJ = 145°C (typical). (4) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 150°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (RθJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (RθJA × PD-MAX ). (5) For detailed soldering specifications and information, please refer to the PowerPAD™ Thermally Enhanced Package Application Note (SLMA002). 6.2 ESD Ratings VALUE UNIT Human-body model (HBM), per AEC Q100-002(1) ±2000 Corner pins (1, 10, 11, V(ESD) Electrostatic discharge ±750 V Charged-device model (CDM), per AEC 20) Q100-011 Other pins ±500 (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 6.3 Recommended Operating Conditions Over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT VIN 4.5 45 VSENSE_N, SD, SW 0 45 Voltage on pins OUT1, OUT2 0 40 V FB, FSET, LDO, ISET, VDDIO/EN, FAULT 0 5.25 SYNC, PWM 0 VDDIO/EN (1) All voltages are with respect to the potential at the GND pins. Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: LP8862-Q1 |
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