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TPS65022 Datasheet(PDF) 10 Page - Texas Instruments |
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TPS65022 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 47 page VCC UVLO* VRTC t NRESPWRON DCDCx_EN V DCDCx O RESPWRON *...InternalSignal VSYSIN=VBACKUP =GND; VINLDO=VCC 0.8V 1.9V 2.52V 3V Ramp Within 800 s m LDO_EN 2.47V V LDOx O 1.8V 2.4V 2.35V 1.2V 1.5V 1.9V slopedepending onload t DEGLITCH HOT_RESET RESPWRON V DCDC3 O defaultvoltage anyvoltageset withI Cinterface 2 t NRESPWRON TPS65022 SLVS667B – JULY 2006 – REVISED JANUARY 2016 www.ti.com 6.6 Timing Requirements VINDCDC1 = VINDCDC2 = VINDCDC3 = VCC = VINLDO = 2.5 V to 5.5 V, VBACKUP = 3 V, TA = –40°C to 85°C. MIN MAX UNIT fMAX Clock frequency 400 kHz twH(HIGH) Clock high time 600 ns twL(LOW) Clock low time 1300 ns tR DATA and CLK rise time 300 ns tF DATA and CLK fall time 300 ns th(STA) Hold time (repeated) START condition (after this period the first clock pulse is generated) 600 ns th(DATA) Setup time for repeated START condition 600 ns th(DATA) Data input hold time 0 ns tsu(DATA) Data input setup time 100 ns tsu(STO) STOP condition setup time 600 ns t(BUF) Bus free time 1300 ns Figure 1. HOT_RESET Timing Figure 2. Power-Up and Power-Down Timing 10 Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: TPS65022 |
Similar Part No. - TPS65022_16 |
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Similar Description - TPS65022_16 |
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