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TPS65022 Datasheet(PDF) 6 Page - Texas Instruments |
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TPS65022 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 47 page TPS65022 SLVS667B – JULY 2006 – REVISED JANUARY 2016 www.ti.com Recommended Operating Conditions (continued) over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT TA Operating ambient temperature –40 85 °C TJ Operating junction temperature –40 125 °C Resistor from VINDCDC3, VINDCDC2, VINDCDC1 to VCC used for filtering(3) 1 10 Ω (3) Up to 3 mA can flow into VCC when all 3 converters are running in PWM. This resistor causes the UVLO threshold to be shifted accordingly. 6.4 Thermal Information TPS65022 THERMAL METRIC(1) RHA (VQFN) UNIT 40 PINS RθJA Junction-to-ambient thermal resistance 31.6 °C/W RθJC(top) Junction-to-case (top) thermal resistance 18.2 °C/W RθJB Junction-to-board thermal resistance 6.6 °C/W ψJT Junction-to-top characterization parameter 0.2 °C/W ψJB Junction-to-board characterization parameter 6.5 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 1.7 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 6.5 Electrical Characteristics VINDCDC1 = VINDCDC2 = VINDCDC3 = VCC = VINLDO = 3.6 V, VBACKUP = 3 V, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CONTROL SIGNALS : SCLK, SDAT (input), DCDC1_EN, DCDC2_EN, DCDC3_EN, LDO_EN, DEFLDO1, DEFLDO2 VIH High level input voltage Rpullup at SCLK and SDAT = 4.7 k Ω, pulled to VRTC 1.3 VCC V VIL Low level input voltage Rpullup at SCLK and SDAT = 4.7 k Ω, pulled to VRTC 0 0.4 V IH Input bias current 0.01 0.1 μA CONTROL SIGNALS : HOT_RESET VIH High level input voltage 1.3 VCC V VIL Low level input voltage 0 0.4 V IIB Input bias current 0.01 0.1 μA tdeglitch Deglitch time at HOT_RESET 25 30 35 ms CONTROL SIGNALS : LOWBAT, PWRFAIL, RESPWRON, INT, SDAT (output) VOH High level output voltage 6 V VOL Low level output voltage IIL = 5 mA 0 0.3 V Duration of low pulse at RESPWRON External capacitor 1 nF 100 ms internal charge and discharge current on pin ICONST used for generating RESPWRON delay 1.7 2 2.3 μA TRESPWRON TRESPWR internal lower comparator threshold on pin used for generating RESPWRON delay 0.225 0.25 0.275 V ON_LOWTH TRESPWRON TRESPWR internal upper comparator threshold on pin used for generating RESPWRON delay 0.97 1 1.103 V ON_UPTH TRESPWRON Resetpwron threshold VRTC falling –3% 2.4 3% V Resetpwron threshold VRTC rising –3% 2.52 3% V ILK leakage current output inactive high 0.1 μA 6 Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: TPS65022 |
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