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TPS65020RHAR Datasheet(PDF) 6 Page - Texas Instruments |
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TPS65020RHAR Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 53 page  TPS65020 SLVS607D – SEPTEMBER 2005 – REVISED JANUARY 2016 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT VI Input voltage on all pins except AGND and PGND pins with respect to AGND –0.3 7 V Current at VINDCDC1, L1, PGND1, VINDCDC2, L2, PGND2, VINDCDC3, L3, PGND3 2000 mA Peak current at all other pins 1000 mA TA Operating free-air temperature –40 85 °C TJ Maximum junction temperature 125 °C Tstg Storage temperature –65 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 7.2 ESD Ratings VALUE UNIT Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V(ESD) Electrostatic discharge V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT Input voltage step-down convertors and VCC pin VCC (VINDCDC1, VINDCDC2, VINDCDC3, VCC); pins must be tied to the 2.5 6 V same voltage rail Output voltage for VDCDC1 step-down convertor(1) 0.6 VINDCDC1 VO Output voltage for VDCDC2 step-down convertor(1) 0.6 VINDCDC2 V Output voltage for VDCDC3 (core) step-down convertor(1) 0.6 VINDCDC3 VI Input voltage for LDOs (VINLDO1, VINLDO2) 1.5 6.5 V VO Output voltage for LDOs (VLDO1, VLDO2) 1 VINLDO1-2 V IO(DCDC1) Output current at L1 1200 mA Inductor at L1(2) 2.2 3.3 μH CI(DCDC1) Input capacitor at VI(DCDC1) (2) 10 μF CO(DCDC1) Output capacitor at VDCDC1 (2) 10 22 μF IO(DCDC2) Output current at L2 1000 mA Inductor at L2 (2) 2.2 3.3 μH CI(DCDC2) Input capacitor at VDCDC2 (2) 10 μF CO(DCDC2) Output capacitor at VDCDC2 (2) 10 22 μF IO(DCDC3) Output current at L3 800 mA Inductor at L3 (2) 2.2 3.3 μH CI(DCDC3) Input capacitor at VDCDC3 (2) 10 μF CO(DCDC3) Output capacitor at VDCDC3 (2) 10 22 μF CI(VCC) Input capacitor at VCC (2) 1 μF Ci(VINLDO) Input capacitor at VINLDO (2) 1 μF CO(VLDO1-2) Output capacitor at VLDO1, VLDO2 (2) 2.2 μF IO(VLDO1-2) Output current at VLDO1, VLDO2 200 mA (1) When using an external resistor divider at DEFDCDC3, DEFDCDC2, DEFDCDC1 (2) See Application and Implementation for more information. 6 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: TPS65020 |
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