TPS65020RHAR datasheet(20/53 Pages) TI1

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TPS65020RHAR Datasheet(PDF) 20 Page - Texas Instruments

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TPS65020

SLVS607D – SEPTEMBER 2005 – REVISED JANUARY 2016

www.ti.com

8 Detailed Description

8.1 Overview

TPS65020 has 5 regulator channels, 3 DCDCs and 2 LDOs. DCDC3 has a dynamic voltage scaling feature,

DVS, that allows for power reduction to CORE supplies during idle operation or over voltage during heavy duty

operation. With DVS and 2 more DCDCs plus 2 LDOs, the TPS65020 is ideal for CORE, Memory, IO, and

peripheral power for the entire system of a wide range of suitable applications.

The device incorporates enables for the DCDCs and LDOs, I2C for device control, pushbutton and a reset

interface that complete the system and allow for the TPS65020 to be adapted for different kinds of processors or

FPGAs.

For noise-sensitive circuits, the DCDCs can be synchronized out of phase from one another, reducing the peak

noise at the switching frequency. Each converter can be forced to operate in PWM mode to ensure constant

switching frequency across the entire load range. However, for low load efficiency performance the DCDCs

automatically enter PSM mode which reduces the switching frequency when the load current is low, saving

power at idle operation.

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Product Folder Links: TPS65020

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