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SP211E Datasheet(PDF) 6 Page - Sipex Corporation |
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SP211E Datasheet(HTML) 6 Page - Sipex Corporation |
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6 / 16 page  SP207EDS/09 SP207E Series High Performance RS232 Transceivers © Copyright 2000 Sipex Corporation 6 Figure 2. Charge Pump — Phase 2 Figure 3. Charge Pump Waveforms +10V a) C 2 + GND GND b) C 2 – –10V Phase 4 — V DD transfer — The fourth phase of the clock connects the negative terminal of C 2 to ground, and transfers the generated l0V across C 2 to C4, the V DD storage capacitor. Again, simultaneously with this, the positive side of capacitor C 1 is switched to +5V and the negative side is connected to ground, and the cycle begins again. Since both V+ and V– are separately generated from V CC; in a no–load condition V + and V– will be symmetrical. Older charge pump approaches that generate V– from V+ will show a decrease in the magnitude of V– compared to V+ due to the inherent inefficiencies in the design. The clock rate for the charge pump typically operates at 15kHz. The external capacitors can be as low as 0.1 µF with a 16V breakdown voltage rating. Transmitter/Driver The drivers are inverting transmitters, which accept either TTL or CMOS inputs and output the RS-232 signals with an inverted sense relative to the input logic levels. Typically, the RS-232 output voltage swing is +9V with no load, and +5V minimum with full load. The transmitter outputs are protected against infinite short–circuits to ground without degradation in reliability. The drivers of the SP211E, and SP213E can be tri–stated by using the SHUTDOWN function. In the “power-off” state, the output impedance will remain greater than 300 ohms, again satisfying the RS-232 specifications. Should the input of the driver be left open, an internal 400Kohm pullup resistor to V CC forces the input high, thus committing the output to a low state. The slew rate of the transmitter output is internally limited to a maximum of 30V/ µs in order to meet the EIA standards (EIA RS-232D 2.1.7, Paragraph 5). The transition of the loaded output from high to low also meets the monotonicity requirements of the standard. VCC = +5V –10V VSS Storage Capacitor VDD Storage Capacitor C1 C2 C3 C4 + + ++ – – – – |
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