VC2

7.6 V

6 V

100%

79%

8.4 V

111%

(VC2

VC1)

CB2

+

)+

VD

CB

CB2

I

(R

R

R

-

=

VC1

CB1

R

CB

CB1

I

R

=

+

9

bq29209-Q1

www.ti.com

SLUSC62A – JUNE 2015 – REVISED MARCH 2016

Product Folder Links: bq29209-Q1

Submit Documentation Feedback

Copyright © 2015–2016, Texas Instruments Incorporated

Feature Description (continued)

8.3.5 Cell Balance Configuration

The cell balancing current may be calculated as follows:

(1)

(2)

Where:

RCB = resistor connected between the top of Cell 1 and the VC1_CB

RCB1 = resistor connected between the top of Cell 1 and the VC1

RCB2 = resistor connected between the top of Cell 2 and the VC2

RVD = resistor connected between the top of Cell 2 and the VDD

8.3.6 Cell Imbalance Auto-Detection (Via Cell Voltage)

recommended range of cell balancing is VC2 and VDD between 6.0 V and 8.4 V, and VC1 between 3 V and 4.2

V. Below VDD = 6 V, it is recommended to pull CB_EN high to disable the cell balancing function.

8.3.7 Customer Test Mode

Customer Test Mode (CTM) helps to greatly reduce the overvoltage detection delay time and enable quicker

customer production testing. This mode is intended for quick-pass board-level verification tests, and, as such,

overvoltage thresholds are to be tested, use the standard delay settings that are intended for normal use.

To enter CTM, VDD should be set to approximately 9.5 V higher than VC2. When CTM is entered, the device

approximately 0.08, thereby reducing the delay time during an overvoltage condition.