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BQ29209-Q1 Datasheet(PDF) 2 Page - Texas Instruments |
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BQ29209-Q1 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 23 page 2 bq29209-Q1 SLUSC62A – JUNE 2015 – REVISED MARCH 2016 www.ti.com Product Folder Links: bq29209-Q1 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Table of Contents 1 Features .................................................................. 1 2 Applications ........................................................... 1 3 Description ............................................................. 1 4 Revision History..................................................... 2 5 Device Options....................................................... 3 6 Pin Configuration and Functions ......................... 3 7 Specifications......................................................... 3 7.1 Absolute Maximum Ratings ...................................... 3 7.2 ESD Ratings.............................................................. 4 7.3 Recommended Operating Conditions ....................... 4 7.4 Thermal Information .................................................. 4 7.5 Electrical Characteristics........................................... 4 7.6 Recommended Cell Balancing Configurations ......... 6 7.7 Typical Characteristics .............................................. 6 8 Detailed Description .............................................. 7 8.1 Overview ................................................................... 7 8.2 Functional Block Diagram ......................................... 7 8.3 Feature Description................................................... 7 8.4 Device Functional Modes........................................ 11 9 Application and Implementation ........................ 12 9.1 Application Information............................................ 12 9.2 Typical Applications ................................................ 12 9.3 System Example ..................................................... 13 10 Power Supply Recommendations ..................... 13 11 Layout................................................................... 14 11.1 Layout Guidelines ................................................. 14 11.2 Layout Example .................................................... 14 12 Device and Documentation Support ................. 15 12.1 Community Resources.......................................... 15 12.2 Trademarks ........................................................... 15 12.3 Electrostatic Discharge Caution ............................ 15 12.4 Glossary ................................................................ 15 13 Mechanical, Packaging, and Orderable Information ........................................................... 15 4 Revision History Changes from Original (June 2015) to Revision A Page • Changed resistor RVD location, added PACK+ and PACK- in the Simplified Schematic image ............................................ 1 • Deleted the Lead Temperature (soldering) from the Absolute Maximum Ratings table ....................................................... 3 • Changed resistor RVD location in Figure 9 ........................................................................................................................... 12 • Added title to Table 1............................................................................................................................................................ 12 • Changed resistor RVD location, added PACK+ and PACK- in Figure 11 ............................................................................ 13 |
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