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BQ27320 Datasheet(PDF) 6 Page - Texas Instruments |
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BQ27320 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 29 page  6 bq27320 SLUSCG9A – FEBRUARY 2016 – REVISED MARCH 2016 www.ti.com Product Folder Links: bq27320 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Internal Clock Oscillators (continued) TA = –40°C to 85°C, 2.4 V < VCC < 2.6 V; typical values at TA = 25°C and VCC = 2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT fLOSC Low Frequency Oscillator 32.768 kHz (1) Specified by design. Not tested in production. 7.10 ADC (Temperature and Cell Measurement) Characteristics TA = –40°C to 85°C, 2.4 V < VCC < 2.6 V; typical values at TA = 25°C and VCC = 2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VADC1 Input voltage range (TS) VSS – 0.125 2 V VADC2 Input voltage range (BAT) VSS – 0.125 5 V VIN(ADC) Input voltage range 0.05 1 V GTEMP Internal temperature sensor voltage gain –2 mV/°C tADC_CONV Conversion time 125 ms Resolution 14 15 bits VOS(ADC) Input offset 1 mV ZADC1 (1) Effective input resistance (TS) 8 M Ω ZADC2 (1) Effective input resistance (BAT) bq27320 not measuring cell voltage 8 M Ω bq27320 measuring cell voltage 100 k Ω Ilkg(ADC) (1) Input leakage current 0.3 μA (1) Specified by design. Not tested in production. 7.11 Integrating ADC (Coulomb Counter) Characteristics TA = –40°C to 85°C, 2.4 V < VCC < 2.6 V; typical values at TA = 25°C and VCC = 2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VSR Input voltage range, V(SRP) and V(SRN) VSR = V(SRP) – V(SRN) –0.125 0.125 V tSR_CONV Conversion time Single conversion 1 s Resolution 14 15 bits VOS(SR) Input offset 10 μV INL Integral nonlinearity error ±0.007% ±0.034% FSR ZIN(SR) (1) Effective input resistance 2.5 M Ω Ilkg(SR) (1) Input leakage current 0.3 μA (1) Specified by design. Not production tested 7.12 Data Flash Memory Characteristics TA = –40°C to 85°C, 2.4 V < VCC < 2.6 V; typical values at TA = 25°C and VCC = 2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tDR (1) Data retention 10 Years Flash-programming write cycles(1) 20,000 Cycles tWORDPROG (1) Word programming time 2 ms ICCPROG (1) Flash-write supply current 5 10 mA tDFERASE (1) Data flash master erase time 200 ms tIFERASE (1) Instruction flash master erase time 200 ms tPGERASE (1) Flash page erase time 20 ms |
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