 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
ATMEGA8515-16AU Datasheet(PDF) 67 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
ATMEGA8515-16AU Datasheet(HTML) 67 Page - ATMEL Corporation |
|
|
67 / 254 page  67 ATmega8515(L) 2512G–AVR–03/05 • MOSI – Port B, Bit 5 MOSI: SPI Master Data output, Slave Data input for SPI channel. When the SPI is enabled as a Slave, this pin is configured as an input regardless of the setting of DDB5. When the SPI is enabled as a Master, the data direction of this pin is controlled by DDB5. When the pin is forced by the SPI to be an input, the pull-up can still be con- trolled by the PORTB5 bit. •SS – Port B, Bit 4 SS: Slave Select input. When the SPI is enabled as a Slave, this pin is configured as an input regardless of the setting of DDB4. As a Slave, the SPI is activated when this pin is driven low. When the SPI is enabled as a Master, the data direction of this pin is con- trolled by DDB4. When the pin is forced by the SPI to be an input, the pull-up can still be controlled by the PORTB4 bit. • AIN1 – Port B, Bit 3 AIN1, Analog Comparator Negative input. Configure the port pin as input with the inter- nal pull-up switched off to avoid the digital port function from interfering with the function of the Analog Comparator. • AIN0 – Port B, Bit 2 AIN0, Analog Comparator Positive input. Configure the port pin as input with the internal pull-up switched off to avoid the digital port function from interfering with the function of the Analog Comparator. • T1 – Port B, Bit 1 T1, Timer/Counter1 Counter Source. • T0/OC0 – Port B, Bit 0 T0, Timer/Counter0 Counter Source. OC0, Output Compare Match output: The PB0 pin can serve as an external output for the Timer/Counter0 Compare Match. The PB0 pin has to be configured as an output (DDB0 set (one)) to serve this function. The OC0 pin is also the output pin for the PWM mode timer function. Table 31 relate the alternate functions of Port B to the overriding signals shown in Figure 33 on page 63. SPI MSTR INPUT and SPI SLAVE OUTPUT constitute the MISO signal, while MOSI is divided into SPI MSTR OUTPUT and SPI SLAVE INPUT. |
Similar Part No. - ATMEGA8515-16AU |
|
Similar Description - ATMEGA8515-16AU |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
