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ATMEGA8515-16AU Datasheet(PDF) 18 Page - ATMEL Corporation |
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ATMEGA8515-16AU Datasheet(HTML) 18 Page - ATMEL Corporation |
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18 / 254 page  18 ATmega8515(L) 2512G–AVR–03/05 EEPROM Data Memory The ATmega8515 contains 512 bytes of data EEPROM memory. It is organized as a separate data space, in which single bytes can be read and written. The EEPROM has an endurance of at least 100,000 write/erase cycles. The access between the EEPROM and the CPU is described in the following, specifying the EEPROM Address Registers, the EEPROM Data Register, and the EEPROM Control Register. “Memory Programming” on page 177 contains a detailed description on EEPROM Pro- gramming in SPI or Parallel Programming mode. EEPROM Read/Write Access The EEPROM Access Registers are accessible in the I/O space. The write access time for the EEPROM is given in Table 1. A self-timing function, how- ever, lets the user software detect when the next byte can be written. If the user code contains instructions that write the EEPROM, some precautions must be taken. In heavily filtered power supplies, V CC is likely to rise or fall slowly on Power-up/down. This causes the device for some period of time to run at a voltage lower than specified as minimum for the clock frequency used. See “Preventing EEPROM Corruption” on page 23. for details on how to avoid problems in these situations. In order to prevent unintentional EEPROM writes, a specific write procedure must be fol- lowed. Refer to the description of the EEPROM Control Register for details on this. When the EEPROM is read, the CPU is halted for four clock cycles before the next instruction is executed. When the EEPROM is written, the CPU is halted for two clock cycles before the next instruction is executed. The EEPROM Address Register – EEARH and EEARL • Bits 15..9 – Res: Reserved Bits These bits are reserved bits in the ATmega8515 and will always read as zero. • Bits 8..0 – EEAR8..0: EEPROM Address The EEPROM Address Registers – EEARH and EEARL – specify the EEPROM address in the 512 bytes EEPROM space. The EEPROM data bytes are addressed lin- early between 0 and 511. The initial value of EEAR is undefined. A proper value must be written before the EEPROM may be accessed. Bit 151413121110 9 8 –––– ––– EEAR8 EEARH EEAR7 EEAR6 EEAR5 EEAR4 EEAR3 EEAR2 EEAR1 EEAR0 EEARL 7654 321 0 Read/Write R RRRR RR R/W R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0000 000 X XX XXX XXX |
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