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ATMEGA8515-16AU Datasheet(PDF) 92 Page - ATMEL Corporation

Part # ATMEGA8515-16AU
Description  8-bit AVR Microcontroller with 8K Bytes In-System Programmable Flash
Download  254 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATMEGA8515-16AU Datasheet(HTML) 92 Page - ATMEL Corporation

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92
ATmega8515(L)
2512G–AVR–03/05
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will
clock the counter even if the pin is configured as an output. This feature allows software
control of the counting.
Timer/Counter Register –
TCNT0
The Timer/Counter Register gives direct access, both for read and write operations, to
the Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes)
the Compare Match on the following timer clock. Modifying the counter (TCNT0) while
the counter is running, introduces a risk of missing a Compare Match between TCNT0
and the OCR0 Register.
Output Compare Register –
OCR0
The Output Compare Register contains an 8-bit value that is continuously compared
with the counter value (TCNT0). A match can be used to generate an output compare
interrupt, or to generate a waveform output on the OC0 pin.
Timer/Counter Interrupt Mask
Register – TIMSK
• Bit 1 – TOIE0: Timer/Counter0 Overflow Interrupt Enable
When the TOIE0 bit is written to one, and the I-bit in the Status Register is set (one), the
Timer/Counter0 Overflow interrupt is enabled. The corresponding interrupt is executed if
an overflow in Timer/Counter0 occurs, i.e., when the TOV0 bit is set in the
Timer/Counter Interrupt Flag Register – TIFR.
• Bit 0 – OCIE0: Timer/Counter0 Output Compare Match Interrupt Enable
When the OCIE0 bit is written to one, and the I-bit in the Status Register is set (one), the
Timer/Counter0 Compare Match interrupt is enabled. The corresponding interrupt is
executed if a Compare Match in Timer/Counter0 occurs, i.e., when the OCF0 bit is set in
the Timer/Counter Interrupt Flag Register – TIFR.
Timer/Counter Interrupt Flag
Register – TIFR
011
clk
I/O/64 (From prescaler)
100
clk
I/O/256 (From prescaler)
101
clk
I/O/1024 (From prescaler)
1
1
0
External clock source on T0 pin. Clock on falling edge.
1
1
1
External clock source on T0 pin. Clock on rising edge.
Table 48. Clock Select Bit Description
CS02
CS01
CS00
Description
Bit
7654
321
0
TCNT0[7:0]
TCNT0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0000
000
0
Bit
7654
321
0
OCR0[7:0]
OCR0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0000
000
0
Bit
7
6
5
432
10
TOIE1
OCIE1A
OCIE1B
TICIE1
TOIE0
OCIE0
TIMSK
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
Bit
7654
321
0


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