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ATMEGA8515-16AU Datasheet(PDF) 91 Page - ATMEL Corporation

Part # ATMEGA8515-16AU
Description  8-bit AVR Microcontroller with 8K Bytes In-System Programmable Flash
Download  254 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATMEGA8515-16AU Datasheet(HTML) 91 Page - ATMEL Corporation

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91
ATmega8515(L)
2512G–AVR–03/05
When OC0 is connected to the pin, the function of the COM01:0 bits depends on the
WGM01:0 bit setting. Table 45 shows the COM01:0 bit functionality when the WGM01:0
bits are set to a normal or CTC mode (non-PWM).
Table 46 shows the COM01:0 bit functionality when the WGM01:0 bits are set to fast
PWM mode.
Note:
1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the
Compare Match is ignored, but the set or clear is done at TOP. See “Fast PWM
Mode” on page 85 for more details.
Table 47 shows the COM01:0 bit functionality when the WGM01:0 bits are set to phase
correct PWM mode.
Note:
1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the
Compare Match is ignored, but the set or clear is done at TOP. See “Phase Correct
PWM Mode” on page 87 for more details.
• Bit 2:0 – CS02:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter.
Table 45. Compare Output Mode, non-PWM Mode
COM01
COM00
Description
0
0
Normal port operation, OC0 disconnected.
0
1
Toggle OC0 on Compare Match.
1
0
Clear OC0 on Compare Match.
1
1
Set OC0 on Compare Match.
Table 46. Compare Output Mode, Fast PWM Mode(1)
COM01
COM00
Description
0
0
Normal port operation, OC0 disconnected.
01
Reserved
1
0
Clear OC0 on Compare Match, set OC0 at TOP.
1
1
Set OC0 on Compare Match, clear OC0 at TOP.
Table 47. Compare Output Mode, Phase Correct PWM Mode
(1)
COM01
COM00
Description
0
0
Normal port operation, OC0 disconnected.
01
Reserved
1
0
Clear OC0 on Compare Match when up-counting. Set OC0 on
Compare Match when downcounting.
1
1
Set OC0 on Compare Match when up-counting. Clear OC0 on
Compare Match when downcounting.
Table 48. Clock Select Bit Description
CS02
CS01
CS00
Description
0
0
0
No clock source (Timer/counter stopped).
001
clk
I/O/(No prescaling)
010
clk
I/O/8 (From prescaler)


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