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ATMEGA8515-16AU Datasheet(PDF) 79 Page - ATMEL Corporation |
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ATMEGA8515-16AU Datasheet(HTML) 79 Page - ATMEL Corporation |
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79 / 254 page  79 ATmega8515(L) 2512G–AVR–03/05 8-bit Timer/Counter0 with PWM Timer/Counter0 is a general purpose, single channel, 8-bit Timer/Counter module. The main features are: • Single Channel Counter • Clear Timer on Compare Match (Auto Reload) • Glitch-free, Phase Correct Pulse Width Modulator (PWM) • Frequency Generator • External Event Counter • 10-bit Clock Prescaler • Overflow and Compare Match Interrupt Sources (TOV0 and OCF0) Overview A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 34. For the actual placement of I/O pins, refer to “Pinout ATmega8515” on page 2. CPU accessible I/O Registers, including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listed in the “8-bit Timer/Counter Register Description” on page 90. Figure 34. 8-bit Timer/Counter Block Diagram Registers The Timer/Counter (TCNT0) and Output Compare Register (OCR0) are 8-bit registers. Interrupt request (abbreviated to Int.Req. in the figure) signals are all visible in the Timer Interrupt Flag Register (TIFR). All interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK). TIFR and TIMSK are not shown in the figure since these registers are shared by other timer units. The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on the T0 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is Timer/Counter = TCNTn Waveform Generation OCn = 0 Control Logic = 0xFF BOTTOM count clear direction TOVn (Int.Req.) OCRn TCCRn Clock Select Tn Edge Detector ( From Prescaler ) clkTn TOP OCn (Int.Req.) |
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