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GS1661 Datasheet(PDF) 3 Page - Semtech Corporation |
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GS1661 Datasheet(HTML) 3 Page - Semtech Corporation |
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3 / 84 page  GS1661 HD/SD SDI Receiver Data Sheet 53751 - 3 September 2012 3 of 84 Contents Key Features........................................................................................................................................................1 Errata......................................................................................................................................................................1 Applications.........................................................................................................................................................1 Description...........................................................................................................................................................1 Functional Block Diagram ..............................................................................................................................2 Revision History .................................................................................................................................................2 1. Pin Out...............................................................................................................................................................7 1.1 Pin Assignment ..................................................................................................................................7 1.2 Pin Descriptions ................................................................................................................................7 2. Electrical Characteristics ......................................................................................................................... 14 2.1 Absolute Maximum Ratings ....................................................................................................... 14 2.2 Recommended Operating Conditions .................................................................................... 14 2.3 DC Electrical Characteristics ..................................................................................................... 15 2.4 AC Electrical Characteristics ..................................................................................................... 16 3. Input/Output Circuits ............................................................................................................................... 20 4. Detailed Description.................................................................................................................................. 24 4.1 Functional Overview .................................................................................................................... 24 4.2 Serial Digital Input ........................................................................................................................ 25 4.2.1 Integrated Adaptive Cable Equalizer.......................................................................... 25 4.3 Serial Digital Loop-Through Output ........................................................................................ 26 4.4 Serial Digital Reclocker ............................................................................................................... 26 4.4.1 PLL Loop Bandwidth ........................................................................................................27 4.5 External Crystal/Reference Clock ...........................................................................................27 4.6 Lock Detect ...................................................................................................................................... 29 4.6.1 Asynchronous Lock .......................................................................................................... 29 4.6.2 Signal Interruption............................................................................................................ 30 4.7 SMPTE Functionality .................................................................................................................... 30 4.7.1 Descrambling and Word Alignment ........................................................................... 30 4.8 Parallel Data Outputs ................................................................................................................... 30 4.8.1 Parallel Data Bus Buffers.................................................................................................30 4.8.2 Parallel Output in SMPTE Mode ................................................................................... 33 4.8.3 Parallel Output in DVB-ASI Mode ............................................................................... 33 4.8.4 Parallel Output in Data-Through Mode ..................................................................... 34 4.8.5 Parallel Output Clock (PCLK)......................................................................................... 34 4.9 Timing Signal Generator ............................................................................................................. 35 4.9.1 Manual Switch Line Lock Handling ............................................................................ 35 4.9.2 Automatic Switch Line Lock Handling....................................................................... 36 4.10 Programmable Multi-function Outputs ............................................................................... 38 4.11 H:V:F Timing Signal Generation ............................................................................................39 4.11.1 CEA-861 Timing Generation ....................................................................................... 40 4.12 Automatic Video Standards Detection ................................................................................ 47 4.13 Data Format Detection & Indication ..................................................................................... 49 4.14 EDH Detection .............................................................................................................................. 50 4.14.1 EDH Packet Detection ................................................................................................... 50 |
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