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GS1661 Datasheet(PDF) 27 Page - Semtech Corporation |
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GS1661 Datasheet(HTML) 27 Page - Semtech Corporation |
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27 / 84 page  GS1661 HD/SD SDI Receiver Data Sheet 53751 - 3 September 2012 27 of 84 4.4.1 PLL Loop Bandwidth The fine frequency and phase lock loop in the GS1661 reclocker is non-linear. The PLL loop bandwidth scales with the jitter amplitude of the input data stream; automatically reduces bandwidth in response to higher jitter. This allows the PLL to reject more of the jitter in the input data stream and produce a very clean reclocked output. The loop bandwidth of the GS1661 PLL is defined with 0.2UI input jitter. The bandwidth is controlled by the LB_CONT pin. Under nominal conditions, with the LB_CONT pin floating and 0.2UI input jitter applied, the loop bandwidth is set to 1/1000 of the frequency of the input data stream. Connecting the LB_CONT pin to 3.3V reduces the bandwidth to half of the nominal setting. Connecting the LB_CONT pin to GND increases the bandwidth to double the nominal setting. Table 4-2 below summarizes this information. 4.5 External Crystal/Reference Clock The GS1661 requires an external 27MHz reference clock for correct operation. This reference clock is generated by connecting a crystal to the XTAL1 and XTAL2 pins of the device. See Application Reference Design on page 78. Table 4-3 shows XTAL characteristics. Alternately, a 27MHz external clock source can be connected to the XTAL1 pin of the device, as shown in Figure 4-2. The frequency variation of the crystal including aging, supply and temperature variation, should be less than +/-100ppm. The equivalent series resistance (or motional resistance) should be a maximum of 50 Ω. The external crystal is used in the frequency acquisition process. It has no impact on the output jitter performance of the part when the part is locked to incoming data. Because of this, the only key parameter is the frequency variation of the crystal that is stated above. Table 4-2: PLL Loop Bandwidth Input Data Rate LB_CONT Pin Connection Loop Bandwidth (MHz)1 SD 3.3V 0.135 Floating 0.27 0V 0.54 HD 3.3V 0.75 Floating 1.5 0V 3.0 1Measured with 0.2UI input jitter applied |
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