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GS1661 Datasheet(PDF) 25 Page - Semtech Corporation

Part # GS1661
Description  HD/SD SDI Receiver, with Integrated Adaptive Cable Equalizer complete with SMPTE Video Processing
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Manufacturer  SEMTECH [Semtech Corporation]
Direct Link  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

GS1661 Datasheet(HTML) 25 Page - Semtech Corporation

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GS1661 HD/SD SDI Receiver
Data Sheet
53751 - 3
September 2012
25 of 84
4.2 Serial Digital Input
The GS1661 can accept serial digital inputs compliant with SMPTE 292 and SMPTE
259M-C.
4.2.1 Integrated Adaptive Cable Equalizer
The GS1661 integrates Gennum's adaptive cable equalizer technology.
The integrated adaptive equalizer can equalize HD and SD serial digital signals, and will
typically equalize 230m of Belden 1694A cable at 1.485Gb/s and 440m at 270Mb/s.The
integrated adaptive equalizer is powered from a single +3.3V power supply and
consumes approximately 195mW of power.
The equalizer can be bypassed by programming register 073h through the GSPI
interface.
4.2.1.1 Serial Digital Inputs
The Serial Data Signal may be connected to the input pins (SDI/SDI) in either a
differential or single ended configuration. AC coupling of the inputs is recommended, as
the SDI and SDI inputs are internally biased at approximately 1.8V.
4.2.1.2 Cable Equalization
The input signal passes through a variable gain equalizing stage whose frequency
response closely matches the inverse of the cable loss characteristic. In addition, the
variation of the frequency response with control voltage imitates the variation of the
inverse cable loss characteristic with cable length.
The edge energy of the equalized signal is monitored by a detector circuit which
produces an error signal corresponding to the difference between the desired edge
energy and the actual edge energy. This error signal is integrated by both an internal and
an external AGC filter capacitor providing a steady control voltage for the gain stage. As
the frequency response of the gain stage is automatically varied by the application of
negative feedback, the edge energy of the equalized signal is kept at a constant level
which is representative of the original edge energy at the transmitter. The equalized
signal is also DC restored, effectively restoring the logic threshold of the equalized signal
to its correct level independent of shifts due to AC coupling.
Figure 4-1: GS1661 Integrated EQ Block Diagram
Equalizer
Output
AGC
SDI
SDO
SDI
SDO
AGC
AGC
GAIN_SEL
DC
Restore


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