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GS1661 Datasheet(PDF) 19 Page - Semtech Corporation |
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GS1661 Datasheet(HTML) 19 Page - Semtech Corporation |
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19 / 84 page ![]() GS1661 HD/SD SDI Receiver Data Sheet 53751 - 3 September 2012 19 of 84 Lock time from power-up – After 20 minutes at -20°C –– 5 s – GSPI GSPI Input Clock FrequencyfSCLK 50% levels 3.3V or 1.8V operation –– 60MHz 5 GSPI Input Clock Duty Cycle DCSCLK 40 50 60% 5 GSPI Input Data Setup Time – 1.5 – – ns 5 GSPI Input Data Hold Time – 1.5 – – ns 5 GSPI Output Data Hold Time – – 1.5 – – ns 5 CS low before SCLK rising edge – 50% levels 3.3V or 1.8V operation 1.5 – – ns 5 Time between end of command word (or data in Auto-Increment mode) and the first SCLK of the following data word - write cycle – 50% levels 3.3V or 1.8V operation 37.1 – – ns 5 Time between end of command word (or data in Auto-Increment mode) and the first SCLK of the following data word - read cycle – 50% levels 3.3V or 1.8V operation 148.4 – – ns 5 CS high after SCLK falling edge – 50% levels 3.3V or 1.8V operation 37.1 – – ns 5 Notes: 1. 1.89V and 0ºC. 2. 3.47V and 0ºC. 3. 1.71V and 85ºC 4. 3.13V and 85ºC 5. Timing parameters defined in Section 4.18.3 6. 0m cable length 7. Tested on a GS1661 board from 5MHz to 1.485GHz. Table 2-4: AC Electrical Characteristics (Continued) Guaranteed over recommended operating conditions unless otherwise noted. Parameter Symbol Conditions Min Typ Max Units Notes |
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