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GS1661 Datasheet(PDF) 11 Page - Semtech Corporation |
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GS1661 Datasheet(HTML) 11 Page - Semtech Corporation |
11 / 84 page ![]() GS1661 HD/SD SDI Receiver Data Sheet 53751 - 3 September 2012 11 of 84 F9, F10, H9, H10, J8, J9, J10, K8, K9, K10 DOUT8, 9, 6, 7, 1, 4, 5, 0, 2, 3 Output PARALLEL DATA BUS Please refer to the Output Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. 20-bit mode 20bit/10bit = HIGH SMPTE mode (SMPTE_BYPASS = HIGH and DVB_ASI = LOW): Chroma data output for SD and HD data rates DVB-ASI mode (SMPTE_BYPASS = LOW and DVB_ASI = HIGH): Not defined Data-Through mode (SMPTE_BYPASS = LOW and DVB_ASI = LOW): Data output 10-bit mode 20bit/10bit = LOW Forced LOW G3RC_BYP Input CONTROL SIGNAL INPUT Please refer to the Input Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. When this pin is LOW, the serial digital output is the buffered version of the input serial data. When this pin is HIGH, the serial digital output is the reclocked version of the input serial data. G7 SMPTE_BYPASS Input/Output CONTROL SIGNAL INPUT/OUTPUT Please refer to the Input/Output Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. Indicates the presence of valid SMPTE data. When the AUTO/MAN bit in the host interface register is HIGH (Default), this pin is an OUTPUT. SMPTE_BYPASS is HIGH when the device locks to a SMPTE compliant input. SMPTE_BYPASS is LOW under all other conditions. When the AUTO/MAN bit in the host interface register is LOW, this pin is an INPUT: No SMPTE scrambling takes place, and none of the I/O processing features of the device are available when SMPTE_BYPASS is set LOW. When SMPTE_BYPASS is set HIGH, the device carries out SMPTE scrambling and I/O processing. When SMPTE_BYPASS and DVB_ASI are both set LOW, the device operates in Data-Through mode. Table 1-1: Pin Descriptions (Continued) Pin Number Name Timing Type Description |
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