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GS1661 Datasheet(PDF) 67 Page - Semtech Corporation |
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GS1661 Datasheet(HTML) 67 Page - Semtech Corporation |
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67 / 84 page  GS1661 HD/SD SDI Receiver Data Sheet 53751 - 3 September 2012 67 of 84 4.19 Host Interface Register Maps Table 4-17: Configuration and Status Registers Address Register Name Bit Name Bit Description R/W Default 000h IOPROC_1 RSVD 15 Reserved. R 0 TRS_WORD_REMAP_DS1 _DISABLE 14 Disables 8-bit TRS word remapping for HD and SD inputs. R/W 0 RSVD 13 Reserved. R/W 0 EDH_FLAG_UPDATE _MASK 12 Disables updating of EDH error flags. R/W 0 EDH_CRC_INS_MASK11 Disables EDH_CRC error correction and insertion. R/W 0 H_CONFIG 10 Selects the H blanking indication: 0: Active line blanking - the H output is HIGH for all the horizontal blanking period, including the EAV and SAV TRS words. 1: TRS based blanking - the H output is set HIGH for the entire horizontal blanking period as indicated by the H bit in the received TRS signals. This signal is only valid when TIM_861 is set to '0' (via pin or host interface). R/W 0 ANC_DATA_EXT_MASK9 Disables ancillary data extraction FIFO. R/W 0 RSVD 8 Reserved. R/W 0 TIM_861_PIN_DISABLE 7 Disable TIM_861 pin control when set to '1', and use TIMING_861 bit instead. R/W 0 TIMING_861 6Selects the output timing reference format: 0 = Digital FVH timing output; 1 = CEA-861 timing output. R/W 0 RSVD 5 Reserved. R/W 0 ILLEGAL_WORD_REMAP _DS1_MASK 4Disables illegal word remapping for HD and SD inputs. R/W 0 000h IOPROC_1 ANC_CHECKSUM _INSERTION_DS1_MASK 3Disables insertion of ancillary data checksums for HD and SD inputs. R/W 0 CRC_INS_DS1_MASK2 Disables insertion of HD CRC words for HD inputs. R/W 0 LNUM_INS_DS1_MASK1 Disables insertion of line numbers for HD inputs. R/W 0 TRS_INS_DS1_MASK0 Disables insertion of TRS words for HD and SD inputs. R/W 0 |
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