GS1661 datasheet(66/84 Pages) SEMTECH

Part #	GS1661

Description	HD/SD SDI Receiver, with Integrated Adaptive Cable Equalizer complete with SMPTE Video Processing

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Manufacturer	SEMTECH [Semtech Corporation]

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66 / 84 page

GS1661 HD/SD SDI Receiver

Data Sheet

53751 - 3

September 2012

66 of 84

This timing must be satisfied across all ambient temperature and power supply

operating conditions, as described in the Electrical Characteristics on page 14.

Table 4-16: GSPI Timing Parameters (50% levels; 3.3V or 1.8V operation)

Parameter

Symbol

Min

Typ

Max

Units

CS low before SCLK rising edget0

1.5

−−

ns

SCLK period

t1

16.67

−−

ns

SCLK duty cycle

t2

40

50

60%

Input data setup time

t3

1.5

−−

ns

Time between end of Command Word (or data in

Auto-Increment mode) and the first SCLK of the

following Data Word – write cycle

t4

PCLK (MHz)

ns

−−

ns

unlocked

100

27.0

37.1

74.25

13.5

148.5

6.7

Time between end of Command Word (or data in

Auto-Increment mode) and the first SCLK of the

following Data Word – read cycle.

t5

PCLK (MHz)

ns

−−

ns

unlocked

−

27.0

148.4

74.25

53.9

148.5

27

Time between end of Command Word (or data in

Auto-Increment mode) and the first SCLK of the

following Data Word – read cycle - ANC FIFO Read

t5

222.6

−−

ns

Output hold time (15pF load)t6

1.5

−−

ns

CS high after last SCLK rising edget7

PCLK (MHz)

ns

−−

ns

unlocked

445

27.0

37.1

74.25

13.5

148.5

6.7

Input data hold time

t8

1.5

−−

ns

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