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GS1661 Datasheet(PDF) 57 Page - Semtech Corporation |
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GS1661 Datasheet(HTML) 57 Page - Semtech Corporation |
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57 / 84 page  GS1661 HD/SD SDI Receiver Data Sheet 53751 - 3 September 2012 57 of 84 4.17 Signal Processing In addition to error detection and indication, the GS1661 can also correct errors, inserting corrected code words, checksums and CRC values into the data stream. The following processing can be performed by the GS1661: 1. TRS error correction and insertion. 2. HD line based CRC correction and insertion. 3. EDH CRC error correction and insertion. 4. HD line number error correction and insertion. 5. Illegal code re-mapping. 6. Ancillary data checksum error correction and insertion. All of the above features are only available in SMPTE mode (SMPTE_BYPASS = HIGH). To enable these features, the IOPROC_EN/DIS pin must be set HIGH, and the individual feature must be enabled via bits in the IOPROC_DISABLE register. The IOPROC_DISABLE register contains one bit for each processing feature allowing each one to be enabled/disabled individually. By default (at power up or after system reset), all of the IOPROC_DISABLE register bits are LOW, enabling all of the processing features. To disable an individual processing feature, set the corresponding IOPROC_DISABLE bit HIGH in the IOPROC_DISABLE register. Table 4-14: IOPROC_DISABLE Register Bits Processing Feature IOPROC_DISABLE Register Bit TRS error correction and insertion TRS_INS Y and C line based CRC error correction CRC_INS Y and C line number error correction LNUM_INS Ancillary data check sum correction ANC_CHECKSUM_INSERTION EDH CRC error correction EDH_CRC_INS Illegal code re-mapping ILLEGAL_WORD_REMAP H timing signal configuration H_CONFIG Update EDH Flags EDH_FLAG_UPDATE_MASK Ancillary Data Extraction ANC_DATA_EXT Regeneration of 352M packets REGEN_352M |
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