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GS1661 Datasheet(PDF) 51 Page - Semtech Corporation |
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GS1661 Datasheet(HTML) 51 Page - Semtech Corporation |
51 / 84 page ![]() GS1661 HD/SD SDI Receiver Data Sheet 53751 - 3 September 2012 51 of 84 4.15 Video Signal Error Detection & Indication The GS1661 includes a number of video signal error detection functions. These are provided to enhance operation of the device when operating in SMPTE mode (SMPTE_BYPASS = HIGH). These features are not available in the other operating modes of the device (i.e. when SMPTE_BYPASS = LOW). Signal errors that can be detected include: 1. TRS errors. 2. HD line based CRC errors. 3. EDH errors. 4. HD line number errors. 5. Video standard errors. The device maintains an ERROR_STAT_X register. Each error condition has a specific flag in the ERROR_STAT_X register, which is set HIGH whenever an error condition is detected. An ERROR_MASK register is also provided, allowing the user to select which error conditions are reported. Each bit of the ERROR_MASK register corresponds to a unique error type. Each bit of each ERROR_MASK register corresponds to a unique error type. By default (at power up or after system reset), all bits of the ERROR_MASK registers are zero, enabling all errors to be reported. Individual error detection may be disabled by setting the corresponding bit HIGH in the mask registers. Error conditions are indicated by a DATA _ERROR signal, which are available for output on the multifunction I/O output pins. This signal is normally HIGH, but is set LOW by the device when an error condition has been detected. This signal is a logical 'NOR' of the appropriate error status flags stored in the ERROR_STAT_X register, which are gated by the bit settings in the ERROR_MASK registers. When an error status bit is HIGH and the corresponding error mask bit is LOW, the corresponding DATA_ERROR signal is set LOW by the device. The ERROR_STAT_X registers, and correspondingly the DATA_ERROR signal, are cleared at the start of the next video field or when read via the host interface, which ever condition occurs first. All bits of the ERROR_STAT_X registers are also cleared under any of the following conditions: 1. LOCKED signal = LOW. 2. SMPTE_BYPASS = LOW. 3. When a change in video standard has been detected. 4. RESET_TRST = LOW Table 4-13 shows the ERROR_STAT_X register and ERROR_MASK_X register. NOTE: Since the error indication registers are cleared once per field, if an external host micro is polling the error registers periodically, an error flag may be missed if it is intermittent, and the polling frequency is less than the field rate. |
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