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GS1661 Datasheet(PDF) 41 Page - Semtech Corporation |
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GS1661 Datasheet(HTML) 41 Page - Semtech Corporation |
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41 / 84 page  GS1661 HD/SD SDI Receiver Data Sheet 53751 - 3 September 2012 41 of 84 4.11.1.1 Vertical Timing When CEA861 timing is selected, the device outputs standards compliant CEA861 timing signals as shown in the figures below; for example 240 active lines per field for SMPTE 125M. The register bit TRS_861 is used to select DFP timing generator mode which follows the vertical blanking timing as defined by the embedded TRS code words. This setting is helpful for 525i. When TRS_861 is set LOW, DE will go HIGH for 480 lines out of 525. When TRS_861 is set HIGH, DE will go HIGH for 487 lines out of 525. The timing of the CEA 861 timing reference signals can be found in the CEA 861 specifications. For information, they are included in the following diagrams. These diagrams may not be comprehensive. Table 4-9: Supported CEA-861 Formats Format CEA-861 Format VD_STD[5:0] 720(1440) x 480i @ 59.94/60Hz 6 & 7 16h, 17h, 19h, 1Bh 720(1440) x 576i @ 50Hz 21 & 22 18h, 1Ah 1280 x 720p @ 59.94/60Hz 4 20h, 00h 1280 x 720p @ 50Hz 19 24h, 04h 1920 x 1080i @ 59.94/60Hz 5 2Ah, 0Ah 1920 x 1080i @ 50Hz 20 2Ch, 0Ch 1920 x 1080p @ 29.97/30Hz 341 2Bh, 0Bh 1920 x 1080p @ 25Hz 332 2Dh, 0Dh 1920 x 1080p @ 23.98/24Hz 32 30h, 10h NOTES: 1,2: Timing is identical for the corresponding formats. Table 4-10: CEA861 Timing Formats Format Parameters 4 H:V:DE Input Timing 1280 x 720p @ 59.94/60Hz 5 H:V:DE Input Timing 1920 x 1080i @ 59.94/60Hz 6&7 H:V:DE Input Timing 720 (1440) x 480i @ 59.94/60Hz 19 H:V:DE Input Timing 1280 x 720p @ 50Hz 20 H:V:DE Input Timing 1920 x 1080i @ 50Hz 21&22 H:V:DE Input Timing 720 (1440) x 576 @ 50Hz 32 H:V:DE Input Timing 1920 x 1080p @ 23.94/24Hz 33 H:V:DE Input Timing 1920 x 1080p @ 25Hz 34 H:V:DE Input Timing 1920 x 1080p @ 29.97/30Hz |
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