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GS1661 Datasheet(PDF) 40 Page - Semtech Corporation |
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GS1661 Datasheet(HTML) 40 Page - Semtech Corporation |
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40 / 84 page  GS1661 HD/SD SDI Receiver Data Sheet 53751 - 3 September 2012 40 of 84 Figure 4-8: H:V:F Output Timing - HD 20-bit Output Mode Figure 4-9: H:V:F Output Timing - HD 10-bit Output Mode Figure 4-10: H:V:F Output Timing - SD 20-bit Output Mode Figure 4-11: H:V:F Output Timing - SD 10-bit Output Mode 4.11.1 CEA-861 Timing Generation The GS1661 is capable of generating CEA 861 timing instead of SMPTE HVF timing for all of the supported video formats. This mode is selected when the TIM_861 pin is HIGH. Horizontal sync (HSYNC), Vertical sync (VSYNC), and Data Enable (DE) timing are output on the STAT[2:0] pins by default. Table 4-9 shows the CEA-861 formats supported by the GS1661: P C LK L U M A D A T A IN P U T C HR OM A DA T A IN P U T H X Y Z (EAV) 000 00 0 3F F 000 00 0 3F F V F 000 00 0 3FF 000 00 0 3FF X Y Z (EAV) X Y Z (SAV) X Y Z (SAV) H S IG NAL T IM IN G : H_ C ONF IG = L O W H _ C ONF IG = H IG H HV F T IM IN G AT S AV 000 00 0 3FF 3F F 00 0 000 P C LK M U L T IP L E XED Y'Cb C r D A T A IN P U T H V F HV F T IM IN G AT EAV P C LK 00 0 000 3FF 3F F X Y Z (EAV) 000 00 0 M U L T IP L E XED Y'Cb C r D A T A IN P U T H V F X Y Z (EAV) XY Z (SAV) X Y Z (SAV) P C LK C H R O M A D A T A IN PU T LU M A D A T A IN P U T H 000 3F F X Y Z (EAV) 000 V F 000 3FF 00 0 H S IG NAL T IM IN G : H_ C ONF IG = L O W H _ C ONF IG = H IG H X Y Z (SAV) M U L T IP L E XE D Y'Cb C r D A T A INPUT P C LK H V F X Y Z (EAV) 00 0 00 0 3F F 00 0 00 0 3F F X Y Z (SAV) H S IG NAL T IM IN G : H_ C ONF IG = L O W H _ C ONF IG = H IG H |
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