Semiconductor Group

5

Logic

The logic unit contains the complete sequence control. The oscillator produces the power-on reset

and the clock frequency. Single-tone, dual-tone or triple-tone operation is programmed on inputs

E1 and E2. The 4-bit digital/analog converters are driven in parallel. In the event of oscillator

disturbance, and after the sequence, the dominant stop output is set. By applying current to pin L,

the sequence can be shortened by a factor of 30 for test purposes.

The following figure shows the envelope of the triple-tone sequence:

Envelope of the Triple-Tone Sequence

Envelope of maximum amplitudes of three

superimposed tones on Q (time scale for

f

Ratio of maximum amplitudes

M3 : M2 : M1 = 1 : 0.89 : 0.67

SAE 800