10 mils

10 mils

40 mils

FR-4

Keep this

space free

from planes,

traces, pads,

and vias

Ground plane

Power plane

Low-speed traces

High-speed traces

ISO7220A, ISO7220B, ISO7220C, ISO7220M

ISO7221A, ISO7221B, ISO7221C, ISO7221M

www.ti.com

SLLS755N – JULY 2006 – REVISED SEPTEMBER 2015

10 Power Supply Recommendations

To ensure reliable operation at all data rates and supply voltages, a 0.1-

μF bypass capacitor is recommended at

possible. If only a single primary-side power supply is available in an application, isolated power can be

generated for the secondary-side with the help of a transformer driver such as Texas Instruments SN6501 data

sheet. For such applications, detailed power supply design and transformer selection recommendations are

available in the data sheet, SN6501 Transformer Driver for Isolated Power Supplies (SLLSEA0).

11 Layout

11.1 Layout Guidelines

A minimum of four layers are required to accomplish a low EMI PCB design (see Figure 23). Layer stacking

should be in the following order (top-to-bottom): high-speed signal layer, ground plane, power plane and low-

frequency signal layer.

•

Route the high-speed traces on the top layer to avoid the use of vias (and the introduction of the inductances)

and allow for clean interconnects between the isolator and the transmitter and receiver circuits of the data

link.

•

Place a solid ground plane next to the high-speed signal layer to establish controlled impedance for

transmission line interconnects and provide an excellent low-inductance path for the return current flow.

•

Place the power plane next to the ground plane to create additional high-frequency bypass capacitance of

•

Route the slower speed control signals on the bottom layer to allow for greater flexibility as these signal links

usually have margin to tolerate discontinuities such as vias.

If an additional supply voltage plane or signal layer is needed, add a second power or ground plane system to

the stack to keep it symmetrical. Adding a second plane system to the stack makes the stack mechanically

stable and prevents it from warping. The power and ground plane of each power system can be placed closer

together,

thus

increasing

the

high-frequency

bypass

capacitance

significantly.

For

detailed

layout

recommendations, see Application Note Digital Isolator Design Guide (SLLA284).

11.1.1 PCB Material

For digital circuit boards operating below 150 Mbps, (or rise and fall times higher than 1 ns), and trace lengths of

up to 10 inches, use standard FR-4 epoxy-glass as PCB material. FR-4 (Flame Retardant 4) meets the

requirements of Underwriters Laboratories UL94-V0, and is preferred over cheaper alternatives because of its

lower dielectric losses at high frequencies, less moisture absorption, greater strength and stiffness, and self-

extinguishing flammability characteristics.

11.2 Layout Example

Figure 23. Recommended Layer Stack

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